Datasheet

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Serial
Interface
and
Control
12-Bit
DAC
Latch
CS
DIN
OUT
Power-On
Reset
x2
12
2-Bit
Control
Latch
2
Power
and Speed
Control
2
Voltage
Bandgap
PGA With
Output Enable
12
REF
FS
SCLK
TLV5636
SLAS223C – JUNE 1999 – REVISED APRIL 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
Terminal Functions
TERMINAL
I/O/P DESCRIPTION
NAME NO.
AGND 5 P Ground
CS 3 I Chip select. Digital input active low, used to enable/disable inputs
DIN 1 I Digital serial data input
FS 4 I Frame sync input
OUT 7 O DAC A analog voltage output
REF 6 I/O Analog reference voltage input/output
SCLK 2 I Digital serial clock input
V
DD
8 P Positive power supply
2