Datasheet

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      
   
SLAS152D − DECEMBER 1997 − REVISED APRIL 2004
14
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APPLICATION INFORMATION
;***************************************************************************************
;* Main Program
;***************************************************************************************
.ps 1000h
.entry
start:
; disable interrupts
setc INTM ; disable maskable interrupts
splk #0ffffh, IFR
splk #0004h, IMR
; set up the timer to interrupt ever 205uS
splk #0000h, 60h
splk #00FFh, 61h
out 61h, PRD
out 60h, TIM
splk #0c2fh, 62h
out 62h, TCR
; Configure SSP to use internal clock, internal frame sync and burst mode
splk #0CC0Eh, 63h
out 63h, SSPCR
splk #0CC3Eh, 63h
out 63h, SSPCR
splk #0000h, 64h ; set initial DAC value
; enable interrupts
clrc INTM ; enable maskable interrupts
; loop forever!
next: idle ;wait for interrupt
b next
; all else fails stop here
done: b done ;hang there
;***************************************************************************************
;* Interrupt Service Routines
;***************************************************************************************
INT1: ret ;do nothing and return
INT23: ret ;do nothing and return
TIM_ISR:
lacl 64h ; restore counter value to ACC
add #1h ; increment DAC value
and #0FFFh ; mask 4 MSBs
sacl 64h ; store 12 bit counter value
or #4000h ; set DAC control bits
sacl 65h ; store DAC value
out 65h, SDTR ; send data
clrc intm ; re-enable interrupts
ret
.END