Datasheet

SLAS138B – APRIL 1996 – REVISED FEBRUARY 1997
TLV5621I LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER
T
emp
l
ate
R
e
l
ease
D
ate:
7
–
11
–
94
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•
CLK
RS
MODE
RNG
A
RNG
B
RNG
C
RNG
D
SIA SIB SIC SID ACT
DATA
DAC
EN
NOTE A: Data is written to the output of a DAC, and the data is latched to the output on the falling edge of EN. A control word then selects double-buffered mode. When the
range is changed, the output changes on the falling edge of EN.
RS A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Figure 4. First Nonzero Write Operation After Startup