Datasheet

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TIMING REQUIREMENTS
TLV5619
SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004
REFERENCE INPUT (REFIN)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
ref
Reference input voltage See
(1)
0 V
DD
-1.5 V
R
i
Reference input resistance 10 MΩ
C
i
Reference input capacitance 5 pF
Reference feed through REFIN = 1 V
pp
at 1 kHz + 1.024 V dc (see
(2)
) 60 dB
Reference input bandwidth REFIN = 0.2 V
pp
+ 1.024 V dc at -3 dB 1.4 MHz
DIGITAL INPUTS (D0-D11, CS, WE, LDAC, PD)
I
IH
High-level digital input current V
I
= V
DD
1 µA
I
IL
Low-level digital input current V
I
= 0 V 1 µA
C
i
Input capacitance 8 pF
(1) Reference input voltages greater than V
DD
/2 will cause output saturation for large DAC codes.
(2) Reference feedthrough is measured at the DAC output with an input code = 0x000 and a V
ref(REFIN)
input = 1.024 V dc + 1 V
pp
at
1 kHz.
POWER SUPPLY
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5-V Supply 1.6 3
I
DD
Power supply current No load, All inputs 0 V or V
DD
mA
3-V Supply 1.44 2.7
Power down supply current 0.01 10 µA
ANALOG OUTPUT DYNAMIC PERFORMANCE
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5-V
V
ref(REFIN)
= 2.048 V,
8 12 V/µs
Supply
C
L
= 100 pF, V
ref(REFIN)
=1.024 V,
SR Slew rate
R
L
= 10 kΩ V
O
from 10% to 90%
3-V
6 9 V/µs
V
O
from 90% to 10%
Supply
Output settling time (full
t
s
To ±0.5 LSB, R
L
= 10 kΩ, C
L
= 100 pF, See
(1)
1 3 µs
scale)
Glitch energy DIN = all 0s to all 1s 5 nV-s
f
s
= 480 kSPS, BW = 20 kHz, C
L
= 100 pF, 5-V
S/N Signal to noise 65 78
f
OUT
= 1 kHz, R
L
= 10 kΩ , T
A
= 25°C, See
(2)
Supply
5-V
58 67
Supply
f
s
= 480 kSPS, BW = 20 kHz, C
L
= 100 pF,
S/(N+D) Signal to noise + distortion
f
OUT
= 1 kHz, R
L
= 10 kΩ, T
A
= 25°C, See
(2)
3-V
58 69 dB
Supply
f
s
= 480 kSPS, BW = 20 kHz, C
L
= 100 pF,
Total harmonic distortion 68 60
f
OUT
= 1 kHz, R
L
= 10 kΩ, T
A
= 25°C, See
(2)
Spurious free dynamic f
s
= 480 kSPS, BW = 20 kHz, C
L
= 100 pF,
60 72
range f
OUT
= 1 kHz, R
L
= 10 kΩ, T
A
= 25°C, See
(2)
(1) Settling time is the time for the output signal to remain within ±0.5 LSB of the final measured value for a digital input code change of 32
to 4063 or 4063 to 32. Limits are ensured by design and characterization, but are not production tested.
(2) 1 kHz sinewave generated by DAC, reference voltage = 1.024 V at 3 V and 2.048 V at 5 V.
DIGITAL INPUTS
MIN NOM MAX UNIT
t
su(CS-WE)
Setup time, CS low before positive WE edge 13 ns
t
su(D)
Setup time, data ready before positive WE edge 9 ns
t
h(D)
Hold time, data held after positive WE edge 0 ns
t
su(WE-LD)
Setup time, positive WE edge before LDAC low 0 ns
t
wh(WE)
Pulse width, WE high 25 ns
t
w(LD)
Pulse width, LDAC low 25 ns
5