Datasheet

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      
   
SLAS152D − DECEMBER 1997 − REVISED APRIL 2004
13
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APPLICATION INFORMATION
TLV5616 interfaced to TMS320C203 DSP
hardware interfacing
Figure 17 shows an example how to connect the TLV5616 to a TMS320C203 DSP. The serial interface of the
TLV5616 is ideally suited to this configuration, using a maximum of four wires to make the necessary
connections. In applications where only one synchronous serial peripheral is used, the interface can be
simplified even further by pulling CS
low all the time as shown in the figure.
FS
DIN
SCLK
OUT
REFIN
CS
AGND
V
DD
REF
FS
DX
CLKX
TMS320C203 TLV5616
R
LOAD
Figure 17. TLV5616 to DSP Interface
software
No setup procedure is needed to access the TLV5616. The output voltage can be set using just a single
command.
out data_addr, SDTR
where data_addr points to an address location holding the control bits and the 12 data bits providing the output
voltage data. SDTR is the address of the transmit FIFO of the synchronous serial port.
The following code shows how to use the timer of the TMS320C203 as a time base to generate a voltage ramp
with the TLV5616.
A timer interrupt is generated every 205 µs. The corresponding interrupt service routine increments the output
code (stored at 0x0064) for the DAC, adds the DAC control bits to the four most significant bits, and writes the
new code to the TLV5616. The resulting period of the saw waveform is:
π = 4096 × 205 E-6 s = 0.84 s
;***************************************************************************************
;* Title : Ramp generation with TLV5616 *
;* Version : 1.0 *
;* DSP : TI TMS320C203 *
;*  (1998) Texas Instruments Incorporated *
;***************************************************************************************
;−−−−−−−−−−− I/O and memory mapped regs −−−−−−−−−−−−
.include ”regs.asm”
;−−−−−−−−−−− vectors −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−
.ps 0h
b start
b INT1
b INT23
b TIM_ISR