Datasheet

TLV5614
2.7-V TO 5.5-V 12-BIT 3-µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS188B – SEPTEMBER 1998 – REVISED APRIL 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, supply
voltages, and reference voltages (unless otherwise noted) (continued)
individual DAC output specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
O
Voltage output range R
L
= 10 kΩ 0 AV
DD
–0.4 V
Output load regulation accuracy R
L
= 2 kΩ vs 10 kΩ 0.1 0.25
% of FS
voltage
reference inputs (REFINAB, REFINCD)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
I
Input voltage range See Note 10 0 AV
DD
–1.5 V
R
I
Input resistance 10 MΩ
C
I
Input capacitance 5 pF
Reference feed through
REFIN = 1 V
pp
at 1 kHz + 1.024 V dc
(see Note 11)
–75 dB
Reference input bandwidth
REFIN 0 2 V 1 024 V dc large signal
Slow 0.5
MHz
Reference input bandwidth REFIN = 0.2 V
pp
+ 1.024 V dc large signal
Fast 1
MHz
NOTES: 10. Reference input voltages greater than V
DD
/2 cause output saturation for large DAC codes.
11. Reference feedthrough is measured at the DAC output with an input code = 000 hex and a V
ref (REFINAB or REFINCD)
input = 1.024 Vdc + 1 V
pp
at 1 kHz.
digital inputs (DIN, CS, LDAC, PD)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
IH
High-level digital input current V
I
= V
DD
±1 µA
I
IL
Low-level digital input current V
I
= 0 V ±1 µA
C
I
Input capacitance 3 pF
power supply
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5-V supply,
No load Clock running
Slow 1.6 2.4
mA
I
Power supply current
No load, Clock running,
All inputs 0 V or V
DD
Fast 3.8 5.6
mA
I
DD
Power supply current
3-V supply,
No load Clock running
Slow 1.2 1.8
mA
No load, Clock running,
All inputs 0 V or DV
DD
Fast 3.2 4.8
mA
Power down supply current (see Figure 12) 10 nA