Datasheet

TLV5614
2.7-V TO 5.5-V 12-BIT 3-µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS188B – SEPTEMBER 1998 – REVISED APRIL 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGE
T
A
SOIC
(D)
TSSOP
(PW)
WSP
†
(YE)
0°C to 70°C TLV5614CD TLV5614CPW –––
–40°C to 85°C TLV5614ID TLV5614IPW TLV5614IYE
†
Wafer Scale Packaging, also called Bumped Dice. See Figure 17.
functional block diagram
Power-On
Reset
14-Bit
Data
and
Control
Register
REFINAB
AGND
CS
DIN
DAC A
Serial
Input
Register
6
9
12-Bit
DAC
Latch
2-Bit
Control
Data
Latch
Power-Down/
Speed Control
_
+
_
+
12
2
2
2
10
14
OUTA
DAC Select/
Control
Logic
FS
DAC B
DAC C
DAC D
LDAC
PD
DGND
AV
DD
DV
DD
7
4
15 16 1
8
32
11
12
13
14
REFINCD
OUTB
OUTC
OUTD
SCLK
5
10
2