Datasheet

TLV5604
2.7-V TO 5.5-V 10-BIT 3-µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS176B – DECEMBER 1997 – REVISED JULY 2002
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
0.20
0.10
0.05
0
0 0.02 0.04 0.1 0.2 0.4 1
– Output Voltage – V
0.25
0.30
Load Current – mA
LOAD REGULATION
0.35
24
0.15
V
O
V
DD
= 5 V,
V
REF
= 2 V,
V
O
= Full Scale
5 V Slow Mode, Sink
5 V Fast Mode, Sink
0.8
Figure 3
0.10
0.08
0.04
0
0 0.01 0.02 0.05 0.1 0.2 0.5
0.16
0.18
LOAD REGULATION
0.20
12
0.14
0.12
0.06
0.02
– Output Voltage – V
Load Current – mA
V
O
V
DD
= 3 V,
V
REF
= 1 V,
V
O
= Full Scale
3 V Slow Mode, Sink
3 V Fast Mode, Sink
0.8
Figure 4
3.994
3.99
3.986
3.984
3.996
4.00
LOAD REGULATION
4.002
3.998
3.992
3.988
– Output Voltage – V
Load Current – mA
V
O
V
DD
= 5 V,
V
REF
= 2 V,
V
O
= Full Scale
5 V Slow Mode, Source
5 V Fast Mode, Source
0 0.02 0.04 0.1 0.2 0.4 1 2 40.8
Figure 5
2.0015
2.0005
1.9995
1.999
2.002
2.0025
LOAD REGULATION
2.003
2.001
2
– Output Voltage – V
Load Current – mA
V
O
3 V Slow Mode, Source
3 V Fast Mode, Source
V
DD
= 3 V,
V
REF
= 1 V,
V
O
= Full Scale
0 0.01 0.02 0.05 0.1 0.2 0.5 1 20.8