Datasheet

TLV5604
2.7-V TO 5.5-V 10-BIT 3-µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS176B – DECEMBER 1997 – REVISED JULY 2002
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
; DAC C
lar ar0, DACc_ptr ; ar0 points to DAC a sample
lacl * ; get DAC a sample into accumulator
or #DACc_control ; OR in DAC C control bits
sacl temp ;
out temp, SDTR ; send data
rpt #016h ; wait long enough for this configuration
nop ; of MCLK/CLKOUT1 rate
; DAC D
lar ar0, DACd_ptr ; ar0 points to DAC a sample
lacl * ; get DAC a sample into accumulator
or #DACd_control ; OR in DAC D control bits
sacl temp ;
out temp, SDTR ; send data
lacl r_ptr ; load rolling pointer to accumulator
add #1h ; increment rolling pointer
and #001Fh ; count 0–31 then wrap back round
sacl r_ptr ; store rolling pointer
rpt #016h ; wait long enough for this configuration
nop ; of MCLK/CLKOUT1 rate
; now take CS high again
lacl iosr_stat ; load acc with iosr status
or #0001h ; set IO0 – CS high
sacl temp ;
out temp, IOSR ;
clrc intm ; re-enable interrupts
ret ; return from interrupt
.end