Datasheet

   
     
  
SLOS289E − DECEMBER 1999 − REVISED SEPTEMBER 2006
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 3) and subcircuit in Figure 33 are generated using
the TLV411x typical electrical and operating characteristics at T
A
= 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D Maximum positive output voltage swing
D Maximum negative output voltage swing
D Slew rate
D Quiescent power dissipation
D Input bias current
D Open-loop voltage amplification
D Unity-gain frequency
D Common-mode rejection ratio
D Phase margin
D DC output resistance
D AC output resistance
D Short-circuit output current limit
NOTE 3: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
* TLV4112_5V operational amplifier ”macromodel” subcircuit
* updated using Model Editor release 9.1 on 01/18/00 at 15:50
Model Editor is an OrCAD product.
*
* connections: non−inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
.subckt TLV4112_5V 1 2 3 4 5
*
c1 11 12 2.2439E−12
c2 6 7 10.000E−12
css 10 99 454.55E−15
dc 5 53 dy
de 54 5 dy
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0
+ 33.395E6 −1E3 1E3 33E6 −33E6
ga 6 0 11 12 168.39E−6
gcm 0 6 10 99 168.39E−12
iss 10 4 dc 13.800E−6
hlim 90 0 vlim 1K
ioff 0 6 dc 75E−9
j1 11 2 10 jx1
J2 12 1 10 jx2
r2 6 9 100.00E3
rd1 3 11 5.9386E3
rd2 3 12 5.9386E3
ro1 8 5 10
ro2 7 99 10
rp 3 4 3.3333E3
rss 10 99 14.493E6
vb 9 0 dc 0
vc 3 53 dc .86795
ve 54 4 dc .86795
vlim 7 8 dc 0
vlp 91 0 dc 300
vln 0 92 dc 300
.model dx D(Is=800.00E−18)
.model dy D(Is=800.00E−18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=150.00E−12 Beta=2.0547E−3 +Vto=−1)
.model jx2 NJF(Is=150.00E−12 Beta=2.0547E−3 + Vto=−1)
.ends
*$
IN−
G
D
S
D
S
G
rp
IN+
rd1 rd2
rss
egnd
fb
ro2
ro1
vlim
OUT
ga
ioffgcm
vb
c1
dc
iss
dp
GND
V
DD
css
c2
ve
de
dlp dln
vlnhlimvlp
10
4
1
11 12
3
53
54
96
8
5
7
91 90 92
vc
99
+
+
+
+
+
+
+
−
−
−
−
−−
−
−
+
r2
2
Figure 32. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.