Datasheet
th
(WS)
ts
(WS)
ts
(DI)
th
(DI)
WCLK
BCLK
SDIN
tH(BCLK)
tL(BCLK)
tP(BCLK)
ts
(WS)
th
(WS)
TIMING CHARACTERISTICS
(1)
TLV320DAC32
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........................................................................................................................................ SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008
TIMING CHARACTERISTICS (continued)
All specifications typical at 25C, DVDD = 1.8 V
IOVDD = 1.1 V IOVDD = 3.3 V
PARAMETER UNIT
MIN MAX MIN MAX
t
H
(BCLK) BCLK high period 70 35 ns
t
L
(BCLK) BCLK low period 70 35 ns
t
s
(WS) WCLK setup time 10 6 ns
t
h
(WS) WCLK hold time 10 6 ns
t
s
(DI) DIN setup time 10 6 ns
t
h
(DI) DIN hold time 10 6 ns
t
r
Rise time 8 4 ns
t
f
Fall time 8 4 ns
Figure 4. DSP Timing in Slave Mode
All specifications typical at 25C, DVDD = 1.8 V
IOVDD = 1.1 V IOVDD = 3.3 V
PARAMETER UNIT
MIN MAX MIN MAX
t
H
(BCLK) BCLK high period 70 35 ns
t
L
(BCLK) BCLK low period 70 35 ns
t
s
(WS) WCLK setup time 10 8 ns
t
h
(WS) WCLK hold time 10 8 ns
t
s
(DI) DIN setup time 10 6 ns
t
h
(DI) DIN hold time 10 6 ns
t
r
Rise time 8 4 ns
t
f
Fall time 8 4 ns
(1) All timing specifications are measured at characterization but not tested at final test.
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