Datasheet

TIMING CHARACTERISTICS
(1)
ts
(DI)
th
(DI)
WCLK
BCLK
SDIN
td
(WS)
td
(WS)
TIMING CHARACTERISTICS
(1)
th
(WS)
ts
(WS)
ts
(DI)
th
(DI)
WCLK
BCLK
SDIN
tL(BCLK)
tH(BCLK)
tP(BCLK)
TIMING CHARACTERISTICS
(1)
TLV320DAC32
SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008 ........................................................................................................................................ www.ti.com
All specifications typical at 25C, DVDD = 1.8 V
IOVDD = 1.1 V IOVDD = 3.3 V
PARAMETER UNIT
MIN MAX MIN MAX
t
d
(WS) WCLK delay time 50 15 ns
t
s
(DI) DIN setup time 10 6 ns
t
h
(DI) DIN hold time 10 6 ns
t
r
Rise time 30 10 ns
t
f
Fall time 30 10 ns
(1) All timing specifications are measured at characterization but not tested at final test.
Figure 2. DSP Timing in Master Mode
All specifications typical at 25C, DVDD = 1.8 V
IOVDD = 1.1 V IOVDD = 3.3 V
PARAMETER UNIT
MIN MAX MIN MAX
t
d
(WS) WCLK delay time 50 15 ns
t
s
(DI) DIN setup time 10 6 ns
t
h
(DI) DIN hold time 10 6 ns
t
r
Rise time 30 10 ns
t
f
Fall time 30 10 ns
(1) All timing specifications are measured at characterization but not tested at final test.
Figure 3. I
2
S/LJF/RJF Timing in Slave Mode
All specifications typical at 25C, DVDD = 1.8 V
(1) All timing specifications are measured at characterization but not tested at final test.
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