Datasheet

TLV320DAC32
SLAS506B NOVEMBER 2006 REVISED DECEMBER 2008 ........................................................................................................................................
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Page 0 / Register 49: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 00000000 Reserved. Do not write to this register.
Page 0 / Register 50: DAC_R to HPLOUT Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_R Output Routing Control
0: DAC_R is not routed to HPLOUT
1: DAC_R is routed to HPLOUT
D6-D0 R/W 0000000 Reserved. Do not write to these register bits.
Page 0 / Register 51: HPLOUT Output Level Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D4 R/W 0000 HPLOUT Output Level Control
0000: Output level control = 0-dB
0001: Output level control = 1-dB
0010: Output level control = 2-dB
...
1000: Output level control = 8-dB
1001: Output level control = 9-dB
1010 1111: Reserved. Do not write these sequences to these register bits.
D3 R/W 0 HPLOUT Mute
0: HPLOUT is muted
1: HPLOUT is not muted
D2 R/W 1 HPLOUT Power Down Drive Control
0: HPLOUT is weakly driven to a common-mode when powered down
1: HPLOUT is tri-stated with powered down
D1 R 0 HPLOUT Volume Control Status
0: All programmed gains to HPLOUT have been applied
1: Not all programmed gains to HPLOUT have been applied yet
D0 R/W 0 HPLOUT Power Control
0: HPLOUT is not fully powered up
1: HPLOUT is fully powered up
Page 0 / Register 52: LINEL to HPLCOM Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 LINEL Output Routing Control
0: LINEL is not routed to HPLCOM
1: LINEL is routed to HPLCOM
D6-D0 R/W 0000000 LINEL to HPLCOM Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 53: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 00000000 Reserved. Do not write to this register.
Page 0 / Register 54: DAC_L to HPLCOM Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_L Output Routing Control
0: DAC_L is not routed to HPLCOM
1: DAC_L is routed to HPLCOM
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