Datasheet

ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
(1)
TLV320DAC32
SLAS506B NOVEMBER 2006 REVISED DECEMBER 2008 ........................................................................................................................................
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TERMINAL FUNCTIONS (continued)
TERMINAL
DESCRIPTION
NO NAME
20 HPLCOM High-Power Output Driver (Left Minus or Multifunctional)
21 DRVSS Analog Output Driver Ground Supply, 0 V
22 HPRCOM High-Power Output Driver (Right Minus or Multifunctional)
23 HPROUT High-Power Output Driver (Right Plus)
24 DRVDD Output Driver Voltage Supply, 2.7 V 3.6 V
25 AVDD_DAC Analog and DAC Voltage Supply, 2.7 V 3.6 V
26,27,
28,29, AVSS_DAC Analog and DAC Ground Supply, 0 V
30
31 RESET Reset
Digital Core Voltage Supply, add 0.1- µ F capacitor to digital ground. Connect to 1.8-V power supply if
32 DVDD
LDO_SELECT = 0 V.
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VALUE UNIT
AVDD_DAC to AVSS_DAC, DRVDD to DRVSS 0.3 to 3.9 V
AVDD_DAC to DRVSS 0.3 to 3.9 V
IOVDD to IOVSS 0.3 to 3.9 V
DVDD to IOVSS 0.3 to 2.5 V
AVDD_DAC to DRVDD 0.1 to 0.1 V
Digital input voltage to IOVSS 0.3 V to IOVDD+0.3 V
Analog input voltage to AVSS_DAC 0.3 V to AVDD_DAC+0.3 V
Operating temperature range -40 to +85 C
Storage temperature range -65 to +105 C
T
J
Max Junction temperature 105 C
Power dissipation (T
J
Max T
A
) / θ
JA
θ
JA
Thermal impedance 44 C/W
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) ESD compliance tested to EIA / JESD22-A114-B and passed.
T
A
= 25C T
A
= 75C T
A
= 85C
DERATING FACTOR
POWER RATING POWER RATING POWER RATING
1.82 W 22.7 mW/C 681 mW 454 mW
(1) This data was taken using 2 oz. trace and copper pad that is soldered directly to a JEDEC standard 4-layer 3 in נ 3 in PCB.
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