Datasheet

DESCRIPTION
SIMPLIFIED BLOCK DIAGRAM
HPR+
HPL-/HPLCOM
HPL+
LINEL
DAC
L
DACR
I2CControl
Bus
AudioClock
Generation
MCLK
Bias/
Reference
MICBIAS
VolumeCtl
&Effects
VolumeCtl
&Effects
SCL
SDA
RESET
LINER
+
+
VCM
+
HPR-/HPRCOM/
SPKFC
+
VCM
AudioSerial
Bus
DIN
BCLK
WCLK
A
VDD_DAC
AVSS_DAC
DRVDD
DRVSS
Voltage
Supplies
LDO
DigitalCore
LDO_SELECT
DVDD
IOVDD
IOVSS
TLV320DAC32
SLAS506B NOVEMBER 2006 REVISED DECEMBER 2008 ........................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
The device is available in a 5 x 5mm 32-lead QFN package.
PACKAGING/ORDERING INFORMATION
(1)
PACKAGE OPERATING ORDERING TRANSPORT
PRODUCT PACKAGE DESIGNATOR TEMPERATURE NUMBER MEDIA, QUANTITY
RANGE
TLV320DAC32IRHBT Tape and Reel, 250
TLV320DAC32 QFN-32 RHB 40C to 85C
TLV320DAC32IRHBR Tape and Reel, 3000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
2 Submit Documentation Feedback Copyright © 2006 2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC32