Datasheet

TLV320DAC3101

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SLAS666A –JANUARY 2010–REVISED MAY 2012

Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (January, 2010) to Revision A Page

• Changed register 36 to register 35. ........................................................................................... 23

• Added D6–D0 to the Register Value column heading and changed Analog Attenuation to Analog Gain. ..... 44

• Deleted Analog Volume Control for Headphone and Speaker Outputs (for D7=0) table and added table

note to D7=1 table. ................................................................................................................ 44

• Changed page 0 to page 1 in section 5.5.12.1. ............................................................................. 45

• Added 80 MHz ≤ (PLL_CLKIN × J.D × R/P) ≤ 110 MHz and 4 ≤ R × J ≤ 259 underneath equation 7. ............. 54

• Added 80 MHz ≤ PLL_CLKIN × J.D × R/P ≤ 110 MHz and R = 1 underneath equation 8. ........................... 54

• Added Timer section and image after PLL section. ....................................................................... 55

• Added table note to Page 0 / Register 64 (0x40): DAC VOLUME CONTROL. ......................................... 73

• Changed D0=1 to Reserved in Page 1 / Register 33. ...................................................................... 79

• Removed extraneous cross-references for deleted table. ................................................................ 80

• Added table note to Page 1 / Register 40 (0x28): HPL Driver. ........................................................... 81

• Added table note to Page 1 / Register 41 (0x29): HPR Driver. ........................................................... 81

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