Datasheet

TLV320DAC3101
SLAS666A –JANUARY 2010–REVISED MAY 2012 www.ti.com
Electrical Characteristics (continued)
At 25°C, AVDD = HPVDD = IOVDD = 3.3 V, SPLVDD, SPRVDD = 3.6 V, DVDD = 1.8 V, f
S
(audio) = 48 kHz, CODEC_CLKIN
= 256 × f
S
, PLL = Off, VOL/MICDET pin disabled (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DAC Output to Class-D Speaker Output; Load = 8 Ω (Differential), 50 pF (Continued)
Output-stage leakage current SPLVDD = SPRVDD = 4.3 V, device is powered
80 nA
for direct battery connection down (power-up-reset condition)
DAC Power Consumption
For DAC power consumption based per selected processing block, see Section 5.3.
DIGITAL INPUT/OUTPUT
Logic family CMOS
0.7 ×
I
IH
= 5 μA, IOVDD ≥ 1.6 V
IOVDD
V
IH
V
I
IH
= 5 μA, IOVDD < 1.6 V IOVDD
0.3 ×
I
IL
= 5 μA, IOVDD ≥ 1.6 V –0.3
IOVDD
V
IL
V
Logic level
I
IL
= 5 μA, IOVDD < 1.6 V 0
0.8 ×
V
OH
I
OH
= 2 TTL loads V
IOVDD
0.1 ×
V
OL
I
OL
= 2 TTL loads V
IOVDD
Capacitive load 10 pF
8 ELECTRICAL SPECIFICATIONS Copyright © 2010–2012, Texas Instruments Incorporated
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