Datasheet

P0048-14
AVSSSPRVSS
IOVSS
SPRVDD
24
1
23
2
22
3
21
4
20
5
19
6
18
7
17
8
16
25
15
26
14
27
13
28
12
29
1130
1031
932
NC
SPRM
AIN2
SPLP
AIN1
SPLVDD
MICBIAS
SPLVSS
VOL/MICDET
SPLM
SCL
DVSS
SDA
AVDD
RHB Package
(Top View)
SPRP
IOVDD
HPL
DVDD
HPVDD
NC
HPVSS
DIN
HPR
WCLK
RESET
BCLK
GPIO1
MCLK
TLV320DAC3101
TLV320DAC3101
SLAS666A –JANUARY 2010–REVISED MAY 2012 www.ti.com
2 PACKAGE AND SIGNAL DESCRIPTIONS
2.1 Package/Ordering Information
OPERATING TRANSPORT MEDIA,
PACKAGE
PRODUCT PACKAGE TEMPERATURE ORDERING NUMBER QUANTITY
DESIGNATOR
RANGE
TLV320DAC3101IRHBT Tape and reel, 250
TLV320DAC3101 QFN-32 RHB –40°C to 85°C
TLV320DAC3101IRHBR Tape and reel, 3000
2.2 Device Information
Table 2-1. TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
AIN1 13 I Analog input #1 routed to output mixer
AIN2 14 I Analog input #2 routed to output mixer
AVDD 17 – Analog power supply
AVSS 16 – Analog ground
BCLK 7 I/O Audio serial bit clock
DIN 5 I Audio serial data input
DVDD 3 – Digital power – digital core
DVSS 18 – Digital ground
GPIO1 32 I/O General-purpose input/output and multifunction pin
HPL 27 O Left-channel headphone/line driver output
HPR 30 O Right-channel headphone/line driver output
HPVDD 28 – Headphone/line driver and PLL power
HPVSS 29 – Headphone/line driver and PLL ground
IOVDD 2 – Interface power
IOVSS 1 – Interface ground
MCLK 8 I Exterrnal master clock
4 PACKAGE AND SIGNAL DESCRIPTIONS Copyright © 2010–2012, Texas Instruments Incorporated
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