Datasheet

DAC_L
DAC_R
24 dB to Mute
24 dB to Mute
Digital
Digital
7- Bit ADC
AVDD
P1
AVSS
R1
R2
18 dB to Mute
24 dB to Mute
D-
DAC
S
D-
DAC
S
Volume Level
Register Controlled
Vol
Ctl
Vol
Ctl
B0210-08
VREF
IN
AVDD
C
VOL
Tone Generator and Mixer Are
NOT Shown
VOL/
MICDET
Processing
Blocks
Processing
Blocks
TLV320DAC3101
SLAS666A –JANUARY 2010–REVISED MAY 2012 www.ti.com
When the volume-pin function is used, a 7-bit Vol ADC reads the voltage on the VOL/MICDET pin and
updates the digital volume control. (It overwrites the current value of the volume control.) The new volume
setting which has been applied due to a change of voltage on the volume control pin can be read on
page 0 / register 117, bits D6–D0. The 7-bit Vol ADC clock source can be selected on page 0 /
register 116, bit D6. The update rate can be programmed on page 0 / register 116, bits D2–D0 for this 7-
bit SAR ADC.
The VOL/MICDET pin gain mapping is shown in Table 5-18.
Table 5-18. VOL/MICDET Pin Gain Mapping
VOL/MICDET PIN SAR OUTPUT DIGITAL GAIN APPLIED
0 18 dB
1 17.5 dB
2 17 dB
: :
35 0.5 dB
36 0.0 dB
37 –0.5 dB
: :
89 –26.5 dB
90 –27 dB
91 –28 dB
: :
125 –62 dB
126 –63 dB
127 Mute
The VOL/MICDET pin connection and functionality are shown in Figure 5-17.
Figure 5-17. Digital Volume Controls for Beep Generator and DAC Play Data
34 APPLICATION INFORMATION Copyright © 2010–2012, Texas Instruments Incorporated
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