Datasheet

TLV320DAC3100
www.ti.com SLAS671A –FEBRUARY 2010–REVISED MAY 2012
Table 6-5. Page-12 DAC Buffer B Registers (continued)
REGISTER
RESET VALUE REGISTER NAME
NUMBER
122 (0x7A) 0000 0000 Coefficient D1(15:8) for right DAC-programmable biquad F
123 (0x7B) 0000 0000 Coefficient D1(7:0) for right DAC-programmable biquad F
124 (0x7C) 0000 0000 Coefficient D2(15:8) for right DAC-programmable biquad F
125 (0x7D) 0000 0000 Coefficient D2(7:0) for right DAC-programmable biquad F
126–127 0000 0000 Reserved
6.8 Control Registers, Page 13: DAC Programmable Coefficients RAM Buffer B (65:127)
Table 6-6. Page 13 / Register 0 (0x00): Page Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 0000 0000: Page 0 selected
0000 0001: Page 1 selected
...
1111 1110: Page 254 selected
1111 1111: Page 255 selected
The remaining page-13 registers are either reserved registers or are used for setting coefficients for the
various filters in the TLV320DAC3101. Reserved registers should not be written to.
The filter-coefficient registers are arranged in pairs, with two adjacent 8-bit registers containing the 16-bit
coefficient for a single filter. The 16-bit integer contained in the MSB and LSB registers for a coefficient is
interpreted as a 2s-complement integer, with possible values ranging from –32,768 to 32,767. When
programming any coefficient value for a filter, the MSB register should always be written first, immediately
followed by the LSB register. Even if only the MSB or LSB portion of the coefficient changes, both
registers should be written in this sequence. Table 6-7 is a list of the page-13 registers, excepting the
previously described register 0.
Table 6-7. Page 13 DAC Buffer B Registers
REGISTER
RESET VALUE REGISTER NAME
NUMBER
1 0000 0000 Reserved. Do not write to this register.
2 (0x02) 0111 1111 Coefficient N0(15:8) for left DAC-programmable first-order IIR
3 (0x03) 1111 1111 Coefficient N0(7:0) for left DAC-programmable first-order IIR
4 (0x04) 0000 0000 Coefficient N1(15:8) for left DAC-programmable first-order IIR
5 (0x05) 0000 0000 Coefficient N1(7:0) for left DAC-programmable first-order IIR
6 (0x06) 0000 0000 Coefficient D1(15:8) for left DAC-programmable first-order IIR
7 (0x07) 0000 0000 Coefficient D1(7:0) for left DAC-programmable first-order IIR
8 (0x08) 0111 1111 Coefficient N0(15:8) for right DAC-programmable first-order IIR
9 (0x09) 1111 1111 Coefficient N0(7:0) for right DAC-programmable first-order IIR
10 (0x0A) 0000 0000 Coefficient N1(15:8) for right DAC-programmable first-order IIR
11 (0x0B) 0000 0000 Coefficient N1(7:0) for right DAC-programmable first-order IIR
12 (0x0C) 0000 0000 Coefficient D1(15:8) for right DAC-programmable first-order IIR
13 (0x0D) 0000 0000 Coefficient D1(7:0) for right DAC-programmable first-order IIR
14 (0x0E) 0111 1111 Coefficient N0(15:8) for DRC first-order high-pass filter
15 (0x0F) 1111 0111 Coefficient N0(7:0) for DRC first-order high-pass filter
16 (0x10) 1000 0000 Coefficient N1(15:8) for DRC first-order high-pass filter
17 (0x11) 0000 1001 Coefficient N1(7:0) for DRC first-order high-pass filter
18 (0x12) 0111 1111 Coefficient D1(15:8) for DRC first-order high-pass filter
19 (0x13) 1110 1111 Coefficient D1(7:0) for DRC first-order high-pass filter
Copyright © 2010–2012, Texas Instruments Incorporated REGISTER MAP 89
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