Datasheet

TLV320DAC3100
www.ti.com SLAS671A –FEBRUARY 2010–REVISED MAY 2012
Page 8 / Register 1 (0x01): DAC Coefficient RAM Control
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D3 R/W 0000 0 Reserved. Write only the reset value.
D2 R/W 0 DAC Adaptive Filtering Control
0: Adaptive filtering disabled in DAC processing block
1: Adaptive filtering enabled in DAC processing block
D1 R 0 DAC Adaptive Filter Buffer Control Flag
0: In adaptive filter mode, DAC processing block accesses DAC coefficient buffer A, and the external
control interface accesses DAC coefficient buffer B.
1: In adaptive filter mode, DAC processing block accesses DAC coefficient buffer B, and the external
control interface accesses DAC coefficient buffer A.
D0 R/W 0 DAC Adaptive Filter Buffer Switch Control
0: DAC coefficient buffers are not switched at the next frame boundary.
1: DAC coefficient buffers are switched at the next frame boundary, if adaptive filtering mode is enabled.
This bit self-clears on switching.
The remaining page-8 registers are either reserved registers or are used for setting coefficients for the
various filters in the TLV320DAC3101. Reserved registers should not be written to.
The filter coefficient registers are arranged in pairs, with two adjacent 8-bit registers containing the 16-bit
coefficient for a single filter. The 16-bit integer contained in the MSB and LSB registers for a coefficient is
interpreted as a 2s-complement integer, with possible values ranging from –32,768 to 32,767. When
programming any coefficient value for a filter, the MSB register should always be written first, immediately
followed by the LSB register. Even if only the MSB or LSB portion of the coefficient changes, both
registers should be written in this sequence. Table 6-2 is a list of the page-8 registers, excepting the
previously described register 0 and register 1.
Table 6-2. Page 8 DAC Buffer A Registers
REGISTER
RESET VALUE REGISTER NAME
NUMBER
2 (0x02) 0111 1111 Coefficient N0(15:8) for left DAC-programmable biquad A
3 (0x03) 1111 1111 Coefficient N0(7:0) for left DAC-programmable biquad A
4 (0x04) 0000 0000 Coefficient N1(15:8) for left DAC-programmable biquad A
5 (0x05) 0000 0000 Coefficient N1(7:0) for left DAC-programmable biquad A
6 (0x06) 0000 0000 Coefficient N2(15:8) for left DAC-programmable biquad A
7 (0x07) 0000 0000 Coefficient N2(7:0) for left DAC-programmable biquad A
8 (0x08) 0000 0000 Coefficient D1(15:8) for left DAC-programmable biquad A
9 (0x09) 0000 0000 Coefficient D1(7:0) for left DAC-programmable biquad A
10 (0x0A) 0000 0000 Coefficient D2(15:8) for left DAC-programmable biquad A
11 (0x0B) 0000 0000 Coefficient D2(7:0) for left DAC-programmable biquad A
12 (0x0C) 0111 1111 Coefficient N0(15:8) for left DAC-programmable biquad B
13 (0x0D) 1111 1111 Coefficient N0(7:0) for left DAC-programmable biquad B
14 (0x0E) 0000 0000 Coefficient N1(15:8) for left DAC-programmable biquad B
15 (0x0F) 0000 0000 Coefficient N1(7:0) for left DAC-programmable biquad B
16 (0x10) 0000 0000 Coefficient N2(15:8) for left DAC-programmable biquad B
17 (0x11) 0000 0000 Coefficient N2(7:0) for left DAC-programmable biquad B
18 (0x12) 0000 0000 Coefficient D1(15:8) for left DAC-programmable biquad B
19 (0x13) 0000 0000 Coefficient D1(7:0) for left DAC-programmable biquad B
20 (0x14) 0000 0000 Coefficient D2(15:8) for left DAC-programmable biquad B
21 (0x15) 0000 0000 Coefficient D2(7:0) for left DAC-programmable biquad B
22 (0x16) 0111 1111 Coefficient N0(15:8) for left DAC-programmable biquad C
23 (0x17) 1111 1111 Coefficient N0(7:0) for left DAC-programmable biquad C
24 (0x18) 0000 0000 Coefficient N1(15:8) for left DAC-programmable biquad C
Copyright © 2010–2012, Texas Instruments Incorporated REGISTER MAP 81
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