Datasheet

TLV320DAC3100
SLAS671A –FEBRUARY 2010–REVISED MAY 2012 www.ti.com
Page 1 / Register 33 (0x21): HP Output Drivers POP Removal Settings
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: If power-down sequence is activated by device software, power down using page 1 / register 46,
bit D7, then power down the DAC simultaneously with the HP and SP amplifiers.
1: If power-down sequence is activated by device software, power down using page 1 / register 46,
bit D7, then power down DAC only after HP and SP amplifiers are completely powered down. This is
to optimize power-down POP.
D6–D3 R/W 0111 0000: Driver power-on time = 0 μs
0001: Driver power-on time = 15.3 μs
0010: Driver power-on time = 153 μs
0011: Driver power-on time = 1.53 ms
0100: Driver power-on time = 15.3 ms
0101: Driver power-on time = 76.2 ms
0110: Driver power-on time = 153 ms
0111: Driver power-on time = 304 ms
1000: Driver power-on time = 610 ms
1001: Driver power-on time = 1.22 s
1010: Driver power-on time = 3.04 s
1011: Driver power-on time = 6.1 s
1100–1111: Reserved. Do not write these sequences to these bits.
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. Scale according to the actual
oscillator frequency.
D2–D1 R/W 11 00: Driver ramp-up step time = 0 ms
01: Driver ramp-up step time = 0.98 ms
10: Driver ramp-up step time = 1.95 ms
11: Driver ramp-up step time = 3.9 ms
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. Scale according to the actual
oscillator frequency.
D0 R/W 0 0: Weakly driven output common-mode voltage is generated from resistor divider of the AVDD supply.
1: Reserved.
Page 1 / Register 34 (0x22): Output Driver PGA Ramp-Down Period Control
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 Reserved. Write only the reset value to this bit.
D6–D4 R/W 000 Speaker Power-Up Wait Time (Duration Based on Using Internal Oscillator)
000: Wait time = 0 ms
001: Wait time = 3.04 ms
010: Wait time = 7.62 ms
011: Wait time = 12.2 ms
100: Wait time = 15.3 ms
101: Wait time = 19.8 ms
110: Wait time = 24.4 ms
111: Wait time = 30.5 ms
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. The values scale according
to the actual oscillator frequency.
D3–D0 R/W 0000 Reserved. Write only the reset value to these bits.
76 REGISTER MAP Copyright © 2010–2012, Texas Instruments Incorporated
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