Datasheet

TLV320DAC3100
www.ti.com SLAS671A –FEBRUARY 2010–REVISED MAY 2012
Page 0 / Register 8 (0x08): PLL D-Value LSB
(1)
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 PLL fractional multiplier D-value LSBs D[7:0]
(1) Note that page 0 / register 8 must be written immediately after page 0 / register 7.
Page 0 / Register 9 (0x09) and Page 0 / Register 10 (0x0B): Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R XXXX XXXX Reserved. Do not use.
Page 0 / Register 11 (0x0B): DAC NDAC_VAL
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: DAC NDAC divider is powered down.
1: DAC NDAC divider is powered up.
D6–D0 R/W 000 0001 000 0000: DAC NDAC divider = 128
000 0001: DAC NDAC divider = 1
000 0010: DAC NDAC divider = 2
...
111 1110: DAC NDAC divider = 126
111 1111: DAC NDAC divider = 127
Page 0 / Register 12 (0x0C): DAC MDAC_VAL
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: DAC MDAC divider is powered down.
1: DAC MDAC divider is powered up.
D6–D0 R/W 000 0001 000 0000: DAC MDAC divider = 128
000 0001: DAC MDAC divider = 1
000 0010: DAC MDAC divider = 2
...
111 1110: DAC MDAC divider = 126
111 1111: DAC MDAC divider = 127
Page 0 / Register 13 (0x0D): DAC DOSR_VAL MSB
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D2 R/W 0000 00 Reserved
D1–D0 R/W 00 DAC OSR Value DOSR(9:8)
Page 0 / Register 14 (0x0E): DAC DOSR_VAL LSB
(1) (2)
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 1000 0000 DAC OSR Value DOSR(7:0)
0000 0000: DAC OSR(7:0) = 1024 (MSB page 0 / register 13, bits D1–D0 = 00)
0000 0001: Reserved.
0000 0010: DAC OSR(7:0) = 2 (MSB page 0 / register 13, bits D1–D0 = 00)
...
1111 1110: DAC OSR(7:0) = 1022 (MSB page 0 / register 13, bits D1–D0 = 11)
1111 1111: DAC OSR(7:0) = Reserved. Do not use.
(1) DOSR must be a multiple of 2 when using filter type A, a multiple of 4 when using filter type B, and a multiple of 8 when using filter type
C.
(2) Note that page 0 / register 14 must be written to immediately after writing to page 0 / register 13.
Page 0 / Register 15 (0x0F) Through Page 0 / Register 24 (0x18): Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W XXXX XXXX Reserved. Do not write to these registers.
Copyright © 2010–2012, Texas Instruments Incorporated REGISTER MAP 63
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