Datasheet
Serial
Interface
and
Clocks
DIN
BCLK
WCLK
MCLK PLL
HPVDDHPVSS
SPKVDDSPKVSS
AVDDAVSS
SPKVSS
SPKVDD
VOL/MICDET
SCL
SDA
GPIOGPIO1
DAC
DAC
MIXER
P1/R35
RESET
DVDDDVSS
IOVDD
IOVSS
AIN2
AIN2
AIN1
AIN1
2 V/2.5 V/AVDD
MICBIAS
Note: Normally,
MCLK is PLL input;
however, BCLK or
GPIO1 can also be
PLL input.
Audio Output Stage
Power Management
De-Pop
and
Soft Start
RC CLK
P1/R33–R34
P1/R46
I C
2
Left DAC
Right DAC
SPKP
SPKM
Mono Class-D
Speaker Driver
6 dB to 24 dB
(6-dB Steps)
Analog
Attenuation
0 dB to –78 dB
and Mute
(0.5-dB Steps)
P1/R42
P1/R38
Class A/B
Headphone/Lineout
Driver
0 dB to 9 dB
(1-dB Steps)
Analog
Attenuation
HPL
P1/R36
P1/R40
L Data
L Data
R Data
R Data
(L+R)/2 Data
(L+R)/2 Data
P0/R63/D3–D2
P0/R63/D5–D4
P0/R116
7-Bit
Vol
ADC
Left and Right
Volume-Control Register
P0/R117
Digital Vol
24 dB to
Mute
Process-
ing
Blocks
P0/R64–R66
S
0 dB to –78 dB
and Mute
(0.5-dB Steps)
Class-A/B
Headphone/Lineout
Driver
0 dB to 9 dB
(1-dB Steps)
Analog
Attenuation
0 dB to –78 dB
and Mute
(0.5-dB Steps)
P1/R41
P1/R37
S
B0360-03
HPR
SPKP
SPKM
P0/R64
P0/R64
TLV320DAC3100
SLAS671A –FEBRUARY 2010–REVISED MAY 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Figure 1-1. Functional Block Diagram
NOTE
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to information. For example, performing a global search on "page 0 / register 27" produces
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2 INTRODUCTION Copyright © 2010–2012, Texas Instruments Incorporated
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