Datasheet

DESCRIPTION (CONTINUED)
SIMPLIFIED BLOCK DIAGRAM
LINE_OUT_L+
LINE_OUT_L−
LINE_OUT_R+
LINE_OUT_R−
MONO_OUT+
MONO_OUT
−
HPR+
HPL−/HPLCOM
HPL+
MIC2/LINE2L+
MIC2/LINE2L− MIC1/LINE1L+
MIC1/LINE1L−
MIC1/LINE1R+
MIC1/LINE1R−
MIC3/LINE3R
MIC3/LINE3L
PGA
0/+59.5dB
0.5dB
steps
ADC ADC
AudioSerial
Bus
DAC
L
DAC
R
DIN
DOUT
BCLK
WCLK
SPI/I2CSerialControl
Bus
SELECT
CSEL/I2C_ADR0
SCLK/I2C_ADR1
MOSI/GPIO
MISO/GPIO
AudioClock
Generation
MCLK
GPIO_1
GPIO_2
Bias/
Reference
MICBIAS
VoltageSupplies
AVDD_DAC
AVSS_DAC
DRVDD
DRVSS
DVDD
DVSS
IOVDD
VolumeCtl
&Effects
VolumeCtl
&Effects
DRVDD
DRVSS
SCL/GPIO
SDA/GPIO
AVDD_ADC
AVSS_ADC
RESETB
MICDET
MIC2/LINE2R− MIC2/LINE2R+
+ +
VCM
+ + +
HPR−/HPRCOM/ SPKFC
+
VCM
+
PGA
0/+59.5dB
0.5dB
steps
+ +
TLV320AIC33
SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008 ........................................................................................................................................... www.ti.com
The TLV320AIC33 operates from an analog supply of 2.7 V – 3.6 V, a digital core supply of 1.65 V – 1.95 V, and a
digital I/O supply of 1.1 V – 3.6 V. The device is available in 5 × 5-mm, 80-ball MIcroStar Junior™ BGA and
7 × 7-mm, 48-lead QFN.
2 Submit Documentation Feedback Copyright © 2006 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC33