Datasheet

TLV320AIC3256
www.ti.com SLOS630B –DECEMBER 2010–REVISED JANUARY 2013
DAC
The TLV320AIC3256 includes a stereo audio DAC supporting data rates from 8kHz to 192kHz. Each channel of
the stereo audio DAC consists of a signal-processing engine with fixed processing blocks, a programmable
miniDSP, a digital interpolation filter, multi-bit digital delta-sigma modulator, and an analog reconstruction filter.
The DAC is designed to provide enhanced performance at low sampling rates through increased oversampling
and image filtering, thereby keeping quantization noise generated within the delta-sigma modulator and signal
images strongly suppressed within the audio band to beyond 20kHz. To handle multiple input rates and optimize
power dissipation and performance, the TLV320AIC3256 allows the system designer to program the
oversampling rates over a wide range from 1 to 1024. The system designer can choose higher oversampling
ratios for lower input data rates and lower oversampling ratios for higher input data rates.
The TLV320AIC3256 DAC channel includes a built-in digital interpolation filter to generate oversampled data for
the sigma-delta modulator. The interpolation filter can be chosen from three different types depending on
required frequency response, group delay and sampling rate.
The DAC path of the TLV320AIC3256 features many options for signal conditioning and signal routing:
• 2 headphone amplifiers
– Ground-centered, bipolar operation or unipolar operation
– Usable in single-ended or differential mode
– Analog volume setting with a range of -6 to +14dB
• 2 line-out amplifiers
– Usable in single-ended or differential mode
– Analog volume setting with a range of -6 to +29dB
• Digital volume control with a range of -63.5 to +24dB
• Mute function
• Dynamic range compression (DRC)
In addition to the standard set of DAC features the TLV320AIC3256 also offers the following special features:
• Built in sine wave generation (beep generator)
• Digital auto mute
• Adaptive filter mode
DAC Processing Blocks — Overview
The TLV320AIC3256 implements signal processing capabilities and interpolation filtering via processing blocks.
These fixed processing blocks give users the choice of how much and what type of signal processing they may
use and which interpolation filter is applied.
The choice between these processing blocks is part of the PowerTune strategy balancing power conservation
and signal processing flexibility. Less signal processing capability will result in less power consumed by the
device. Table 10 gives an overview over all available processing blocks of the DAC channel and their properties.
The Resource Class Column (RC) gives an approximate indication of power consumption.
The signal processing blocks available are:
• First-order IIR
• Scalable number of biquad filters
• 3D – Effect
• Beep Generator
The processing blocks are tuned for typical cases and can achieve high image rejection or low group delay in
combination with various signal processing effects such as audio effects and frequency shaping. The available
first-order IIR and biquad filters have fully user-programmable coefficients. The Resource Class Column (RC)
gives an approximate indication of power consumption.
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