Datasheet

TLV320AIC3256

SLOS630B –DECEMBER 2010–REVISED JANUARY 2013

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DESCRIPTION (CONTINUED)

The TLV320AIC3256 features two fully-programmable miniDSP cores that support application-specific algorithms

in the record and/or the playback path of the device. The miniDSP cores are fully software controlled. Target

miniDSP algorithms, such as active noise cancellation, acoustic echo cancellation or advanced DSP filtering are

loaded into the device after power-up.

Extensive register-based control of power, input/output channel configuration, gains, effects, pin-multiplexing and

clocks is included, allowing the device to precisely target its application. The device operates from 8kHz mono

voice playback to audio stereo 192kHz DAC playback; ideal for portable battery-powered audio and telephony

applications.

The record path of the TLV320AIC3256 ranges from 8kHz mono to 192kHz stereo recording, and contains

programmable input channel configurations covering single-ended and differential setups, as well as floating or

mixing input signals. A digitally-controlled stereo microphone preamplifier also integrates microphone bias. Digital

signal processing blocks can remove audible noise that may be introduced by mechanical coupling, such as

optical zooming in a digital camera.

The playback path offers signal-processing blocks for filtering and effects, and supports flexible mixing of DAC

and analog input signals as well as programmable volume controls. The playback path contains two high-power

output drivers that eliminate the need for ac coupling capacitors. A built in charge pump generates the negative

supply for the ground-centered high-power output drivers. The high-power outputs can be configured in multiple

ways, including stereo and mono BTL.

The device can be programmed to various power-performance trade-offs. Mobile applications frequently have

multiple use cases requiring very low power operation while being used in a mobile environment. When used in a

docked environment power consumption typically is less of a concern, while minimizing noise is important. The

TLV320AIC3256 addresses both cases.

The device offers single supply operation from 1.5V-1.95V. Digital I/O voltages are supported in the range of

1.1V-3.6V.

The required internal clock of the TLV320AIC3256 can be derived from multiple sources, including the MCLK pin,

the BCLK pin, the GPIO pin or the output of the internal PLL, where the input to the PLL again can be derived

from the MCLK pin, the BCLK or GPIO pins. Although using the PLL ensures the availability of a suitable clock

signal, it is not recommended for the lowest power settings. The PLL is highly programmable and can accept

available input clocks in the range of 512kHz to 50MHz.

The device is available in the 5mm × 5mm, 40-pin QFN or 3.5mm × 3.3mm 42-ball WCSP package.

Product Folder Links: TLV320AIC3256