Datasheet
TLV320AIC3204
SLOS602B –SEPTEMBER 2008–REVISED OCTOBER 2012
www.ti.com
ADC
The TLV320AIC3204 includes a stereo audio ADC, which uses a delta-sigma modulator with a programmable
oversampling ratio, followed by a digital decimation filter. The ADC supports sampling rates from 8kHz to
192kHz. In order to provide optimal system power management, the stereo recording path can be powered up
one channel at a time, to support the case where only mono record capability is required.
The ADC path of the TLV320AIC3204 features a large set of options for signal conditioning as well as signal
routing:
• Two ADCs
• Six analog inputs which can be mixed and-or multiplexed in single-ended and-or differential configuration
• Two programmable gain amplifiers (PGA) with a range of 0 to +47.5dB
• Two mixer amplifiers for analog bypass
• Two low power analog bypass channels
• Fine gain adjustment of digital channels with 0.1dB step size
• Digital volume control with a range of -12 to +20dB
• Mute function
• Automatic gain control (AGC)
In addition to the standard set of ADC features the TLV320AIC3204 also offers the following special functions:
• Built in microphone bias
• Stereo digital microphone interface
• Channel-to-channel phase adjustment
• Fast charge of ac-coupling capacitors
• Anti thump
• Adaptive filter mode
ADC Processing
The TLV320AIC3204 ADC channel includes a built-in digital decimation filter to process the oversampled data
from the sigma-delta modulator to generate digital data at Nyquist sampling rate with high dynamic range. The
decimation filter can be chosen from three different types, depending on the required frequency response, group
delay and sampling rate.
ADC Processing Blocks
The TLV320AIC3204 offers a range of processing blocks which implement various signal processing capabilities
along with decimation filtering. These processing blocks give users the choice of how much and what type of
signal processing they may use and which decimation filter is applied.
The choice between these processing blocks is part of the PowerTune strategy to balance power conservation
and signal-processing flexibility. Less signal-processing capability reduces the power consumed by the device.
Table 9 gives an overview of the available processing blocks and their properties. The Resource Class Column
(RC) gives an approximate indication of power consumption.
The signal processing blocks available are:
• First-order IIR
• Scalable number of biquad filters
• Variable-tap FIR filter
• AGC
The processing blocks are tuned for common cases and can achieve high anti-alias filtering or low group delay in
combination with various signal processing effects such as audio effects and frequency shaping. The available
first order IIR, BiQuad and FIR filters have fully user-programmable coefficients. The Resource Class Column
(RC) gives an approximate indication of power consumption.
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