Datasheet

TLV320AIC31
SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
Page 0 / Register 72: HPRCOM Output Level Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D4 R/W 0000 HPRCOM Output Level Control
0000: Output level control = 0-dB
0001: Output level control = 1-dB
0010: Output level control = 2-dB
...
1000: Output level control = 8-dB
1001: Output level control = 9-dB
1010 – 1111: Reserved. Do not write these sequences to these register bits.
D3 R/W 0 HPRCOM Mute
0: HPRCOM is muted
1: HPRCOM is not muted
D2 R/W 1 HPRCOM Power Down Drive Control
0: HPRCOM is weakly driven to a common-mode when powered down
1: HPRCOM is 3-stated with powered down
D1 R 1 HPRCOM Volume Control Status
0: Not all programmed gains to HPRCOM have been applied yet
1: All programmed gains to HPRCOM have been applied
D0 R/W 0 HPRCOM Power Control
0: HPRCOM is not fully powered up
1: HPRCOM is fully powered up
Table 8.2. Page 0 / Register 73 – 78: Reserved Registers
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 00000000 Reserved. Write only '00000000' to these registers.
Page 0 / Register 79: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 0000010 Reserved. Write only '0000010' to this register.
Page 0 / Register 80: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D0 R/W 0000000 Reserved. Write only '0000000' to this register.
Page 0 / Register 81: PGA_L to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_L Output Routing Control
0: PGA_L is not routed to LEFT_LOP/M
1: PGA_L is routed to LEFT_LOP/M
D6-D0 R/W 0000000 PGA_L to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5 .
Page 0 / Register 82: DAC_L1 to LEFT_LOP/M Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_L1 Output Routing Control
0: DAC_L1 is not routed to LEFT_LOP/M
1: DAC_L1 is routed to LEFT_LOP/M
D6-D0 R/W 0000000 DAC_L1 to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5 .
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