Datasheet
TLV320AIC31
SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 .............................................................................................................................................
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Page 0 / Register 15: Left ADC PGA Gain Control Register (continued)
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D6-D0 R/W 0000000 Left ADC PGA Gain Setting
0000000: Gain = 0.0-dB
0000001: Gain = 0.5-dB 0000010: Gain = 1.0-dB
…
1110110: Gain = 59.0-dB
1110111: Gain = 59.5-dB
1111000: Gain = 59.5-dB
…
1111111: Gain = 59.5-dB
Page 0 / Register 16: Right ADC PGA Gain Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 1 Right ADC PGA Mute
0: The right ADC PGA is not muted
1: The right ADC PGA is muted
D6-D0 R/W 0000000 Right ADC PGA Gain Setting
0000000: Gain = 0.0-dB
0000001: Gain = 0.5-dB
0000010: Gain = 1.0-dB
…
1110110: Gain = 59.0-dB
1110111: Gain = 59.5-dB
1111000: Gain = 59.5-dB
…
1111111: Gain = 59.5-dB
Page 0 / Register 17: IN2L/R to Left ADC Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D4 R/W 1111 IN2L Input Level Control for Left ADC PGA Mix
Setting the input level control to a gain below automatically connects IN2L to the left ADC PGA
mix
0000: Input level control gain = 0.0-dB
0001: Input level control gain = – 1.5-dB
0010: Input level control gain = – 3.0-dB
0011: Input level control gain = – 4.5-dB
0100: Input level control gain = – 6.0-dB
0101: Input level control gain = – 7.5-dB
0110: Input level control gain = – 9.0-dB
0111: Input level control gain = – 10.5-dB
1000: Input level control gain = – 12.0-dB
1001 – 1110: Reserved. Do not write these sequences to these register bits
1111: IN2L is not connected to the left ADC PGA
D3-D0 R/W 1111 IN2R Input Level Control for Left ADC PGA Mix
Setting the input level control to a gain below automatically connects IN2R to the left ADC PGA
mix
0000: Input level control gain = 0.0-dB
0001: Input level control gain = – 1.5-dB
0010: Input level control gain = – 3.0-dB
0011: Input level control gain = – 4.5-dB
0100: Input level control gain = – 6.0-dB
0101: Input level control gain = – 7.5-dB
0110: Input level control gain = – 9.0-dB
0111: Input level control gain = – 10.5-dB
1000: Input level control gain = – 12.0-dB
1001 – 1110: Reserved. Do not write these sequences to these register bits
1111: IN2R is not connected to the left ADC PGA
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