Datasheet

HPLOUT
HPLCOM
HPROUT
HPRCOM
DAC_L2
VCM
VCM
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
DAC_R2
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
VolumeLevel0dBto
+9dB,Mute
VolumeLevel0dBto
+9dB,Mute
VolumeLevel0dBto
+9dB,Mute
VolumeLevel0dBto
+9dB,Mute
TLV320AIC31
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Figure 31. Architecture of the Output Stage Leading to the High-Power Output Drivers
The high-power output drivers include additional circuitry to avoid artifacts on the audio output during power-on
and power-off transient conditions. The user should first program the type of output configuration being used in
Page-0/Reg-14 , to allow the device to select the optimal power-up scheme to avoid output artifacts. The
power-up delay time for the high-power output drivers is also programmable over a wide range of time delays,
from instantaneous up to four seconds, using Page-0/Reg-42 .
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Product Folder Link(s): TLV320AIC31