Datasheet

TLV320AIC3120
www.ti.com SLAS653A –FEBRUARY 2010–REVISED MAY 2012
Page 0 / Register 46 (0x2E): Interrupt Flags – DAC
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R 0 0: No short circuit detected at HPOUT / class-D driver
1: Short circuit detected at HPOUT / class-D driver
D6 R 0 Reserved
D5 R X 0: No headset button pressed
1: Headset button pressed
D4 R X 0: Headset removal detected
1: Headset insertion detected
D3 R 0 0: DAC signal power is ≤ signal threshold of DRC.
1: DAC signal power is > signal threshold of DRC.
D2 R 0 Reserved.
D1 R 0 DAC miniDSP Engine Standard Interrupt-Port Output
0: Read a 0 from standard interrupt port
1: Read a 1 from standard interrupt port
D0 R 0 DAC miniDSP Engine Auxiliary Interrupt-Port Output
0: Read a 0 from auxiliary interrupt port
1: Read a 1 from auxiliary interrupt port
Page 0 / Register 47 (0x2F): Interrupt Flags – ADC
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R 0 Reserved
D6 R 0 0: Delta-sigma mono ADC signal power ≥ noise threshold for the AGC
1: Delta-sigma mono ADC signal power < noise threshold for the AGC
D5 R 0 Reserved
D4 R X ADC PRB Engine Standard Interrupt-Port Output
0: Read a 0 from standard interrupt port
1: Read a 1 from standard interrupt port
D3 R X ADC PRB Engine Auxiliary Interrupt-Port Output
0: Read a 0 from auxilliary interrupt-port
1: Read a 1 from auxilliary interrupt-port
D2 R 0 0: DC measurement using delta-sigma audio ADC is not available.
1: DC measurement using delta sigma audio ADC is available.
D1–D0 R 00 Reserved
Page 0 / Register 48 (0x30): INT1 Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: Headset-insertion detect interrupt is not used in the generation of INT1 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT1 interrupt.
D6 R/W 0 0: Button-press detect interrupt is not used in the generation of INT1 interrupt.
1: Button-press detect interrupt is used in the generation of INT1 interrupt.
D5 R/W 0 0: DAC DRC signal-power interrupt is not used in the generation of INT1 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT1 interrupt.
D4 R/W 0 0: ADC AGC noise interrupt is not used in the generation of INT1 interrupt.
1: ADC AGC noise interrupt is used in the generation of INT1 interrupt.
D3 R/W 0 0: Short-circuit interrupt is not used in the generation of INT1 interrupt.
1: Short-circuit interrupt is used in the generation of INT1 interrupt.
D2 R/W 0 0: Engine-generated interrupt is not used in the generation of INT1 interrupt.
1: Engine-generated interrupt is used in the generation of INT1 interrupt.
D1 R/W 0 0: DC measurement using delta-sigma audio ADC data-available interrupt is not used in the generation
of INT1 interrupt.
1: DC measurement using delta-sigma audio ADC data-available interrupt is used in the generation of
INT1 interrupt.
D0 R/W 0 0: INT1 is only one pulse (active-high) of typical 2-ms duration.
1: INT1 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
Copyright © 2010–2012, Texas Instruments Incorporated REGISTER MAP 91
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