Datasheet

TLV320AIC3120
SLAS653A FEBRUARY 2010REVISED MAY 2012
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Electrical Characteristics (continued)
At 25°C, AVDD = HPVDD = IOVDD = 3.3 V, SPKVDD = 3.6V, DVDD = 1.8 V, f
S
(audio) = 48 kHz, CODEC_CLKIN = 256 ×
f
S
, PLL = Off, VOL/MICDET pin disabled (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DAC OUTPUT to CLASS-D SPEAKER OUTPUT; Load = 8 (Differential), 50 pF
SPKVDD 3.6 V, BTL measurement, DAC input = 0
dBFS, CM = 1.8 V, class-D gain = 6 dB, THD –16.5 2.2
dB
Output voltage Vrms
SPKVDD = 3.6 V, BTL measurement, DAC input = –2
dBFS, CM = 1.8 V, class-D gain = 6 dB, THD –20 2.1
dB
SPKVDD = 3.6 V, BTL measurement, DAC input =
Output, common-mode 1.8 V
mute, class-D gain = 6 dB
SPKVDD = 3.6 V, BTL measurement, class-D gain =
6 dB, measured as idle-channel noise, A-weighted
SNR Signal-to-noise ratio 87 dB
(with respect to full-scale output value of 2.2 Vrms)
(1)
(2)
SPKVDD = 3.6 V, BTL measurement, DAC input = –6
THD Total harmonic distortion –67 dB
dBFS, CM = 1.8 V, class-D gain = 6 dB
Total harmonic distortion + SPKVDD = 3.6 V, BTL measurement, DAC input = –6
THD+N –66 dB
noise dBFS, CM = 1.8 V, class-D gain = 6 dB
SPKVDD = 3.6 V, BTL measurement, ripple on
PSRR Power-supply rejection ratio
(3)
–44 dB
SPKVDD = 200 mVp-p at 1 kHz
Mute attenuation 110 dB
SPKVDD = 3.6 V, BTL measurement, CM = 1.8 V,
0.7
class-D gain = 18 dB, THD = 10%
SPKVDD = 4.3 V, BTL measurement, CM = 1.8 V,
P
O
Maximum output power 1 W
class-D gain = 18 dB, THD = 10%
SPKVDD = 5.5 V, BTL measurement, CM = 1.8 V,
1.6
class-D gain = 18 dB, THD = 10%
Output-stage leakage current SPKVDD = 4.3 V, device is powered down (power-
80 nA
for direct battery connection up-reset condition)
ADC and DAC POWER CONSUMPTION
For ADC and DAC power consumption based per selected processing block, see Section 5.4
DIGITAL INPUT/OUTPUT
Logic
CMOS
family
0.7 ×
I
IH
= 5 μA, IOVDD 1.6 V
IOVDD
V
IH
V
I
IH
= 5 μA, IOVDD < 1.6 V IOVDD
0.3 ×
I
IL
= 5 μA, IOVDD 1.6 V –0.3
IOVDD
V
IL
V
Logic level
I
IL
= 5 μA, IOVDD < 1.6 V 0
0.8 ×
V
OH
I
OH
= 2 TTL loads V
IOVDD
0.1 ×
V
OL
I
OL
= 2 TTL loads V
IOVDD
Capacitive load 10 pF
(1) Ratio of output level with 1-kHz full-scale sine-wave input, to the output level with the inputs short-circuited, measured A-weighted over a
20-Hz to 20-kHz bandwidth using an audio analyzer.
(2) All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter may
result in higher THD+N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass filter
removes out-of-band noise, which, although not audible, may affect dynamic specification values.
(3) DAC to speaker-out PSRR is a differential measurement calculated as PSRR = 20 × log(ΔV
SPK(P + M)
/ ΔV
SPKVDD
).
8 ELECTRICAL SPECIFICATIONS Copyright © 2010–2012, Texas Instruments Incorporated
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