Datasheet

BCLK
WCLK
T0202-03
DOUT
1
1
0
0
1/f
S
LSB
LSB
LSB
MSB
MSB
MSB
2
2
n–1
n–1
n–2
n–2
n–3
n–3
ADCMonoChannel(D0)
ADCMonoChannel(D0)
1ClockBeforeMSB
1
1
0
0
1/f
S
LSB
MSB
2
2
n–1
n–1
n–1
n–2
n–2
n–3
n–3
ADCMonoChannel(D1)
ADCMonoChannel(D1)
TLV320AIC3120
SLAS653A –FEBRUARY 2010–REVISED MAY 2012 www.ti.com
Figure 5-45. Timing Diagram for I
2
S Mode for Mono Audio ADC
76 APPLICATION INFORMATION Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TLV320AIC3120