Datasheet

TLV320AIC3120
SLAS653A –FEBRUARY 2010–REVISED MAY 2012 www.ti.com
Based on the available master clock, the chosen DOSR and the targeted sampling rate, the clock divider
values NDAC and MDAC can be determined. If necessary, the internal PLL can add a large degree of
flexibility.
In summary, CODEC_CLKIN (derived directly from the system clock source or from the internal PLL)
divided by MDAC, NDAC, and DOSR must be equal to the DAC sampling rate DAC_f
S
. The
CODEC_CLKIN clock signal is shared with the DAC clock generation block.
CODEC_CLKIN = NDAC × MDAC × DOSR × DAC_f
S
To a large degree, NDAC and MDAC can be chosen independently in the range of 1 to 128. In general,
NDAC should be as large as possible as long as the following condition can still be met:
MDAC × DOSR / 32 ≥ RC
RC is a function of the chosen processing block and is listed in Table 5-20.
The common-mode voltage setting of the device is determined by the available analog power supply.
At this point, the following device-specific parameters are known: PRB_Rx, DOSR, NDAC, MDAC, input
and output common-mode values. If the PLL is used, the PLL parameters P, J, D, and R are determined
as well.
Step 2
Setting up the device via register programming:
The following list gives a sequence of items that must be executed in the time between powering the
device up and reading data from the device:
1. Define starting point:
(a) Power up applicable external hardware power supplies
(b) Set register page to 0
(c) Initiate SW reset
2. Program clock settings
(a) Program PLL clock dividers P, J, D, and R (if PLL is used)
(b) Power up PLL (if PLL is used)
(c) Program and power up NDAC
(d) Program and power up MDAC
(e) Program OSR value
(f) Program I
2
S word length if required (e.g., 20 bits)
(g) Program the processing block to be used
3. Program analog blocks
(a) Set register page to 1
(b) Program common-mode voltage
(c) Program headphone-specific depop settings (in case headphone driver is used)
(d) Program routing of DAC output to the output amplifier (headphone/lineout or speaker)
(e) Unmute and set gain of output driver
(f) Power up output driver
4. Apply waiting time determined by the de-pop settings and the soft-stepping settings of the driver gain,
or poll page 1 / register 63
64 APPLICATION INFORMATION Copyright © 2010–2012, Texas Instruments Incorporated
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