Datasheet

TLV320AIC3110
www.ti.com SLAS647B –DECEMBER 2009–REVISED MAY 2012
Page 0 / Register 39 (0x27): Overflow Flags
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7
(1)
R 0 Left-Channel DAC Overflow Flag
0: Overflow has not occurred.
1: Overflow has occurred.
D6
(1)
R 0 Right-Channel DAC Overflow Flag
0: Overflow has not occurred.
1: Overflow has occurred.
D5
(1)
R 0 DAC Barrel Shifter Output Overflow Flag
0: Overflow has not occurred.
1: Overflow has occurred.
D4 R/W 0 Reserved. Write only zeros to these bits.
D3
(1)
R 0 Delta-Sigma Mono ADC Overflow Flag
0: Overflow has not occurred.
1: Overflow has occurred.
D2 R/W 0 Reserved. Write only zero to this bit.
D1
(1)
R 0 ADC Barrel Shifter Output Overflow Flag
0: Overflow has not occurred.
1: Overflow has occurred.
D0 R/W 0 Reserved. Write only zero to this bit.
(1) Sticky flag bIts. These are read-only bits. They are automatically cleared once they are read and are set only if the source trigger occurs
again.
Page 0 / Registers 40–43: Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R XXXX XXXX Reserved. Do not write to these registers.
Page 0 / Register 44: Interrupt Flags—DAC
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7
(1)
R 0 0: No short circuit is detected at HPL/left class-D driver.
1: Short circuit is detected at HPL/left class-D driver.
D6
(1)
R 0 0: No short circuit is detected at HPR/right class-D driver.
1: Short circuit is detected at HPR/right class-D driver.
D5
(1)
R X 0: No headset button pressed
1: Headset button pressed
D4
(1)
R X 0: No headset insertion/removal is detected.
1: Headset insertion/removal is detected.
D3
(1)
R 0 0: Left DAC signal power is les than or equal to the signal threshold of DRC.
1: Left DAC signal power is above the signal threshold of DRC.
D2
(1)
R 0 0: Right DAC signal power is less than or equal to the signal threshold of DRC.
1: Right DAC signal power is above the signal threshold of DRC.
D1 R 0 Reserved. Do not write to these registers.
D0 R 0 Reserved. Do not write to these registers.
(1) Sticky flag bIts. These are read-only bits. They are automatically cleared once they are read and are set only if the source trigger occurs
again.
Page 0 / Register 45 (0x2D): Interrupt Flags—ADC
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 Reserved. Write only zero to this bit.
D6
(1)
R 0 0: ADC signal power greater than noise threshold for AGC.
1: ADC signal power less than noise threshold for AGC.
D5–D3 R 000 Reserved. Write only zeroes.
D2 R 0 0: DC measurement using Delta Sigma Audio ADC is not available
1: DC measurement using Delta Sigma Audio ADC is not available
D1–D0 R/W 00 Reserved. Write only zeros to these bits.
(1) Sticky flag bIts. These are read-only bits. They are automatically cleared once they are read and are set only if the source trigger occurs
again.
Copyright © 2009–2012, Texas Instruments Incorporated REGISTER MAP 89
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