Datasheet

TLV320AIC3110
www.ti.com SLAS647B –DECEMBER 2009–REVISED MAY 2012
Page 0 / Register 8 (0x08): PLL D-VAL LSB
(1)
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 PLL fractional multiplier D-Val LSB bits D[7:0]
(1) Note that page 0 / Register 8 must be written immediately after page 0 / Register 7.
Page 0 / Registers 9–10: Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W XXXX XXXX Reserved. Write only zeros to these bits.
Page 0 / Register 11 (0x0B): DAC NDAC_VAL
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: DAC NDAC divider is powered down.
1: DAC NDAC divider is powered up.
D6–D0 R/W 000 0001 000 0000: DAC NDAC divider = 128
000 0001: DAC NDAC divider = 1
000 0010: DAC NDAC divider = 2
...
111 1110: DAC NDAC divider = 126
111 1111: DAC NDAC divider = 127
Page 0 / Register 12 (0x0C): DAC MDAC_VAL
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: DAC MDAC divider is powered down.
1: DAC MDAC divider is powered up.
D6–D0 R/W 000 0001 000 0000: DAC MDAC divider = 128
000 0001: DAC MDAC divider = 1
000 0010: DAC MDAC divider = 2
...
111 1110: DAC MDAC divider = 126
111 1111: DAC MDAC divider = 127
Page 0 / Register 13 (0x0D): DAC DOSR_VAL MSB
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D2 R/W 0000 00 Reserved. Write only reset vlaues.
D1–D0 R/W 00 DAC OSR (DOSR) Setting
DAC OSR(MSB) & DAC OSR(LSB)
00 0000 0000: DOSR=1024
00 0000 0001: DOSR=1
00 0000 0010: DOSR=2
...
11 1111 1110: DOSR=1022
11 1111 1111: DOSR=1023
Note: This register is updated when Page-0, Reg-14 is written to immediately after Page-0, Reg-13
Note: DOSR should be a multiple of 2 while using DAC Filter Type A, Multiple of 4 while using DAC
Filter Type B and Multiple of 8 while using DAC Filter Type C
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