Datasheet

TLV320AIC3106
www.ti.com ........................................................................................................................................ SLAS509E – DECEMBER 2006 – REVISED DECEMBER 2008
Page 1 / Register 70: Left Channel ADC High Pass Filter D1 Coefficient LSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0111 1110 Left Channel ADC High Pass Filter D1 Coefficient LSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 71: Right Channel ADC High Pass Filter N0 Coefficient MSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0011 1001 Right Channel ADC High Pass Filter N0 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 72: Right Channel ADC High Pass Filter N0 Coefficient LSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0101 0101 Right Channel ADC High Pass Filter N0 Coefficient LSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 73: Right Channel ADC High Pass Filter N1 Coefficient MSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 1111 0011 Right Channel ADC High Pass Filter N1 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 74: Right Channel ADC High Pass Filter N1 Coefficient LSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0010 1101 Right Channel ADC High Pass Filter N1 Coefficient LSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 75: Right Channel ADC High Pass Filter D1 Coefficient MSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0101 0011 Right Channel ADC High Pass Filter D1 Coefficient MSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Register 76: Right Channel ADC High Pass Filter D1 Coefficient LSB Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0111 1110 Right Channel ADC High Pass Filter D1 Coefficient LSB The 16-bit integer contained in the MSB
and LSB registers for this coefficient are interpreted as a 2s-complement integer, with possible
values ranging from – 32768 to 32767.
Page 1 / Registers 77 – 127: Reserved Registers
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R 0000 0000 Reserved. Do not write to these registers.
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