Datasheet

TLV320AIC3106
www.ti.com ........................................................................................................................................ SLAS509E – DECEMBER 2006 – REVISED DECEMBER 2008
Page 0 / Register 87: LINE2L to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 LINE2L Output Routing Control
0: LINE2L is not routed to RIGHT_LOP/M
1: LINE2L is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 LINE2L to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 88: PGA_L to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_L Output Routing Control
0: PGA_L is not routed to RIGHT_LOP/M
1: PGA_L is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 PGA_L to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 89: DAC_L1 to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_L1 Output Routing Control
0: DAC_L1 is not routed to RIGHT_LOP/M
1: DAC_L1 is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 DAC_L1 to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 90: LINE2R to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 LINE2R Output Routing Control
0: LINE2R is not routed to RIGHT_LOP/M
1: LINE2R is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 LINE2R to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 91: PGA_R to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_R Output Routing Control
0: PGA_R is not routed to RIGHT_LOP/M
1: PGA_R is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 PGA_R to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
Page 0 / Register 92: DAC_R1 to RIGHT_LOP/M Volume Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_R1 Output Routing Control
0: DAC_R1 is not routed to RIGHT_LOP/M
1: DAC_R1 is routed to RIGHT_LOP/M
D6 – D0 R/W 000 0000 DAC_R1 to RIGHT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5
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