Datasheet

AudioSerialDataBus
DOUT
GPIO1 GPIO2 MFP3
WCLK BCLK DIN
PossibleProcessor Types:
ApplicationProcessor,MultimediaProcessor,
Compressed AudioDecoder,WirelessModem,
BluetoothModule, Additional Audio/VoiceCodec
Processor
2
Processor
1
GPIO2
WCLK
BCLK
DIN
DOUT
MFP3
GPIO1
AIC3106
TLV320AIC3106
SLAS509E – DECEMBER 2006 – REVISED DECEMBER 2008 ........................................................................................................................................ www.ti.com
Figure 19. Alternate Audio Bus Mulitplexing Function
In cases where MFP3 is needed for a secondary device digital input, the TLV320AIC3106 must be used in I
2
C
mode (when in SPI mode, MFP3 is used as the SPI bus MOSI pin and thus cannot be used here as an alternate
digital input source).
This mux capability allows the TLV320AIC3106 to communicate with two separate devices with independent
I
2
S/PCM buses. An example of such an application is a cellphone containing a Bluetooth transceiver with
PCM/I
2
S interface, as shown in Figure 20 . The applications processor can be connected to the WCLK, BCLK,
DIN, DOUT pins on the TLV320AIC3106, while a Bluetooth device with PCM interface can be connected to the
GPIO1, GPIO2, MFP3, and DOUT pins on the TLV320AIC3106. By programming the registers via I
2
C control,
the applications processor can determine which device is communicating with the TLV320AIC3106. This is
attractive in cases where the TLV320AIC3106 can be configured to communicate data with the Bluetooth device,
then the applications processor can be put into a low power sleep mode, while voice/audio transmission still
occurs between the Bluetooth device and the TLV320AIC3106.
Figure 20. TLV320AIC3106 Connected to Multiple Audio Devices
The audio bus of the TLV320AIC3106 can be configured for left or right justified, I
2
S, DSP, or TDM modes of
operation, where communication with standard telephony PCM interfaces is supported within the TDM mode.
These modes are all MSB-first, with data width programmable as 16, 20, 24, or 32 bits. In addition, the word
clock (WCLK or GPIO1) and bit clock (BCLK or GPIO2) can be independently configured in either Master or
Slave mode, for flexible connectivity to a wide variety of processors
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Product Folder Link(s): TLV320AIC3106