Datasheet

TLV320AIC3104
SLAS510C –FEBRUARY 2007–REVISED DECEMBER 2010 www.ti.com
Table 22. Page 0/Register 47: DAC_L1 to HPLOUT Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_L1 Output Routing Control
0: DAC_L1 is not routed to HPLOUT.
1: DAC_L1 is routed to HPLOUT.
D6–D0 R/W 000 0000 DAC_L1 to HPLOUT Analog Volume Control
For 7-bit register settings versus analog gain values, see Table 19.
Table 23. Page 0/Register 48: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 Reserved. Do not write to this register.
Table 24. Page 0/Register 49: PGA_R to HPLOUT Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 PGA_R Output Routing Control
0: PGA_R is not routed to HPLOUT
1: PGA_R is routed to HPLOUT
D6–D0 R/W 000 0000 PGA_R to HPLOUT Analog Volume Control
For 7-bit register settings versus analog gain values, see Table 19.
Table 25. Page 0/Register 50: DAC_R1 to HPLOUT Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 DAC_R1 Output Routing Control
0: DAC_R1 is not routed to HPLOUT.
1: DAC_R1 is routed to HPLOUT.
D6–D0 R/W 000 0000 DAC_R1 to HPLOUT Analog Volume Control
For 7-bit register settings versus analog gain values, see Table 19.
Table 26. Page 0/Register 51: HPLOUT Output Level Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D4 R/W 0000 HPLOUT Output Level Control
0000: Output level control = 0 dB
0001: Output level control = 1 dB
0010: Output level control = 2 dB
...
1000: Output level control = 8 dB
1001: Output level control = 9 dB
1010–1111: Reserved. Do not write these sequences to these register bits.
D3 R/W 0 HPLOUT Mute
0: HPLOUT is muted.
1: HPLOUT is not muted.
D2 R/W 1 HPLOUT Power-Down Drive Control
0: HPLOUT is weakly driven to a common-mode when powered down.
1: HPLOUT is high-impedance when powered down.
D1 R 1 HPLOUT Volume Control Status
0: All programmed gains to HPLOUT have been applied.
1: Not all programmed gains to HPLOUT have been applied yet.
D0 R/W 0 HPLOUT Power Control
0: HPLOUT is not fully powered up.
1: HPLOUT is fully powered up.
Table 27. Page 0/Register 52: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D0 R/W 0000 0000 Reserved. Do not write to this register.
62 Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Links: TLV320AIC3104