Datasheet

TLV320AIC3104
SLAS510C –FEBRUARY 2007–REVISED DECEMBER 2010 www.ti.com
Table 12. Page 0/Register 38: High-Power Output Driver Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D6 R 00 Reserved. Write only zeros to these register bits.
D5–D3 R/W 000 HPRCOM Output Driver Configuration Control
000: HPRCOM configured as differential of HPROUT
001: HPRCOM configured as constant VCM output
010: HPRCOM configured as independent single-ended output
011: HPRCOM configured as differential of HPLCOM
100: HPRCOM configured as external feedback with HPLCOM as constant VCM output
101–111: Reserved. Do not write these sequences to these register bits.
D2 R/W 0 Short-Circuit Protection Control
0: Short-circuit protection on all high-power output drivers is disabled.
1: Short-circuit protection on all high-power output drivers is enabled.
D1 R/W 0 Short-Circuit Protection Mode Control
0: If short-circuit protection is enabled, it limits the maximum current to the load.
1: If short-circuit protection is enabled, it powers down the output driver automatically when a short is
detected.
D0 R 0 Reserved. Write only zero to this bit.
Table 13. Page 0/Register 39: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D0 R 0000 0000 Reserved. Do not write to this register.
Table 14. Page 0/Register 40: High-Power Output Stage Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D6 R/W 00 Output Common-Mode Voltage Control
00: Output common-mode voltage = 1.35 V
01: Output common-mode voltage = 1.5 V
10: Output common-mode voltage = 1.65 V
11: Output common-mode voltage = 1.8 V
D5–D2 R/W 0000 Reserved. Write only zeros to these bits.
D1–D0 R/W 00 Output Volume Control Soft-Stepping
00: Output soft-stepping = one step per sample period
01: Output soft-stepping = one step per two sample periods
10: Output soft-stepping disabled
11: Reserved. Do not write this sequence to these bits.
Table 15. Page 0/Register 41: DAC Output Switching Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D6 R/W 00 Left-DAC Output Switching Control
00: Left-DAC output selects DAC_L1 path.
01: Left-DAC output selects DAC_L3 path to left line output driver.
10: Left-DAC output selects DAC_L2 path to left high-power output drivers.
11: Reserved. Do not write this sequence to these register bits.
D5–D4 R/W 00 Right-DAC Output Switching Control
00: Right-DAC output selects DAC_R1 path.
01: Right-DAC output selects DAC_R3 path to right line output driver.
10: Right-DAC output selects DAC_R2 path to right high-power output drivers.
11: Reserved. Do not write this sequence to these register bits.
D3–D2 R/W 00 Reserved. Write only zeros to these bits.
D1–D0 R/W 00 DAC Digital Volume Control Functionality
00: Left- and right-DAC channels have independent volume controls.
01: Left-DAC volume follows the right-DAC digital volume control register.
10: Right-DAC volume follows the left-DAC digital volume control register.
11: Left- and right-DAC channels have independent volume controls (same as 00).
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