Datasheet
TLV320AIC3104
SLAS510C –FEBRUARY 2007–REVISED DECEMBER 2010
www.ti.com
Page 0/Register 17: MIC2L/R to Left-ADC Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D4 R/W 1111 MIC2L Input Level Control for Left-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects MIC2L to the left-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: MIC2L is not connected to the left-ADC PGA.
D3–D0 R/W 1111 MIC2R/LINE2R Input Level Control for Left-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects MIC2R to the left-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: MIC2R/LINE2R is not connected to the left-ADC PGA.
Page 0/Register 18: MIC2/LINE2 to Right-ADC Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7–D4 R/W 1111 MIC2L/LINE2L Input Level Control for Right -DC PGA Mix
Setting the input level control to one of the following gains automatically connects MIC2L to the right-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: MIC2L/LINE2L is not connected to the right-ADC PGA.
D3–D0 R/W 1111 MIC2R/LINE2R Input Level Control for Right-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects MIC2R to the right-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: MIC2R/LINE2R is not connected to right-ADC PGA.
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