Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- DESCRIPTION (Continued)
- PIN ASSIGNMENTS
- ABSOLUTE MAXIMUM RATINGS
- PACKAGE THERMAL RATINGS
- SYSTEM THERMAL CHARACTERISTICS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- TYPICAL CHARACTERISTICS
- OVERVIEW
- HARDWARE RESET
- DIGITAL CONTROL SERIAL INTERFACE
- I2C CONTROL INTERFACE
- I2C BUS DEBUG IN A GLITCHED SYSTEM
- DIGITAL AUDIO DATA SERIAL INTERFACE
- RIGHT-JUSTIFIED MODE
- LEFT-JUSTIFIED MODE
- I2S MODE
- DSP MODE
- TDM DATA TRANSFER
- AUDIO DATA CONVERTERS
- AUDIO CLOCK GENERATION
- STEREO AUDIO ADC
- DIGITAL AUDIO PROCESSING FOR RECORD PATH
- AUTOMATIC GAIN CONTROL (AGC)
- STEREO AUDIO DAC
- DIGITAL AUDIO PROCESSING FOR PLAYBACK
- DIGITAL INTERPOLATION FILTER
- DELTA-SIGMA AUDIO DAC
- AUDIO DAC DIGITAL VOLUME CONTROL
- INCREASING DAC DYNAMIC RANGE
- ANALOG OUTPUT COMMON-MODE ADJUSTMENT
- AUDIO DAC POWER CONTROL
- AUDIO ANALOG INPUTS
- ANALOG INPUT BYPASS PATH FUNCTIONALITY
- ADC PGA SIGNAL BYPASS PATH FUNCTIONALITY
- INPUT IMPEDANCE AND VCM CONTROL
- MICBIAS GENERATION
- PASSIVE ANALOG BYPASS DURING POWER DOWN
- ANALOG FULLY DIFFERENTIAL LINE OUTPUT DRIVERS
- ANALOG HIGH-POWER OUTPUT DRIVERS
- SHORT-CIRCUIT OUTPUT PROTECTION
- JACK/HEADSET DETECTION
- CONTROL REGISTERS
- Output Stage Volume Controls
TLV320AIC3101
www.ti.com
........................................................................................................................................ SLAS520D – FEBRUARY 2007 – REVISED DECEMBER 2008
Page 1/Register 49: Right-Channel De-Emphasis Filter N1 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 1111 0011 Right-Channel De-Emphasis Filter N1 Coefficient MSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 50: Right-Channel De-Emphasis Filter N1 Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0010 1101 Right-Channel De-Emphasis Filter N1 Coefficient LSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 51: Right-Channel De-Emphasis Filter D1 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0101 0011 Right-Channel De-Emphasis Filter D1 Coefficient MSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 52: Right-Channel De-Emphasis Filter D1 Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0111 1110 Right-Channel De-Emphasis Filter D1 Coefficient LSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 53: 3-D Attenuation Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0111 1111 3-D Attenuation Coefficient MSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 54: 3-D Attenuation Coefficient LSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 1111 1111 3-D Attenuation Coefficient LSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
Page 1/Register 55 – 64: Reserved Registers
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R 0000 0000 Reserved. Do not write to these registers.
Page 1/Register 65: Left-Channel ADC High-Pass Filter N0 Coefficient MSB Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R/W 0011 1001 Left-Channel ADC High-Pass Filter N0 Coefficient MSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
2s-complement integer, with possible values ranging from – 32,768 to 32,767.
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