Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- DESCRIPTION (Continued)
- PIN ASSIGNMENTS
- ABSOLUTE MAXIMUM RATINGS
- PACKAGE THERMAL RATINGS
- SYSTEM THERMAL CHARACTERISTICS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- TYPICAL CHARACTERISTICS
- OVERVIEW
- HARDWARE RESET
- DIGITAL CONTROL SERIAL INTERFACE
- I2C CONTROL INTERFACE
- I2C BUS DEBUG IN A GLITCHED SYSTEM
- DIGITAL AUDIO DATA SERIAL INTERFACE
- RIGHT-JUSTIFIED MODE
- LEFT-JUSTIFIED MODE
- I2S MODE
- DSP MODE
- TDM DATA TRANSFER
- AUDIO DATA CONVERTERS
- AUDIO CLOCK GENERATION
- STEREO AUDIO ADC
- DIGITAL AUDIO PROCESSING FOR RECORD PATH
- AUTOMATIC GAIN CONTROL (AGC)
- STEREO AUDIO DAC
- DIGITAL AUDIO PROCESSING FOR PLAYBACK
- DIGITAL INTERPOLATION FILTER
- DELTA-SIGMA AUDIO DAC
- AUDIO DAC DIGITAL VOLUME CONTROL
- INCREASING DAC DYNAMIC RANGE
- ANALOG OUTPUT COMMON-MODE ADJUSTMENT
- AUDIO DAC POWER CONTROL
- AUDIO ANALOG INPUTS
- ANALOG INPUT BYPASS PATH FUNCTIONALITY
- ADC PGA SIGNAL BYPASS PATH FUNCTIONALITY
- INPUT IMPEDANCE AND VCM CONTROL
- MICBIAS GENERATION
- PASSIVE ANALOG BYPASS DURING POWER DOWN
- ANALOG FULLY DIFFERENTIAL LINE OUTPUT DRIVERS
- ANALOG HIGH-POWER OUTPUT DRIVERS
- SHORT-CIRCUIT OUTPUT PROTECTION
- JACK/HEADSET DETECTION
- CONTROL REGISTERS
- Output Stage Volume Controls

TLV320AIC3101
www.ti.com
........................................................................................................................................ SLAS520D – FEBRUARY 2007 – REVISED DECEMBER 2008
Page 0/Register 42: Output Driver Pop Reduction Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D4 R/W 0000 Output Driver Power-On Delay Control
0000: Driver power-on time = 0 µ s
0001: Driver power-on time = 10 µ s
0010: Driver power-on time = 100 µ s
0011: Driver power-on time = 1 ms
0100: Driver power-on time = 10 ms
0101: Driver power-on time = 50 ms
0110: Driver power-on time = 100 ms
0111: Driver power-on time = 200 ms
1000: Driver power-on time = 400 ms
1001: Driver power-on time = 800 ms
1010: Driver power-on time = 2 s
1011: Driver power-on time = 4 s
1100 – 1111: Reserved. Do not write these sequences.
D3 – D2 R/W 00 Driver Ramp-Up Step Timing Control
00: Driver ramp-up step time = 0 ms
01: Driver ramp-up step time = 1 ms
10: Driver ramp-up step time = 2 ms
11: Driver ramp-up step time = 4 ms
D1 R/W 0 Weak Output Common-Mode Voltage Control
0: Weakly driven output common-mode voltage is generated from resistor divider off the AVDD supply.
1: Weakly driven output common-mode voltage is generated from band-gap reference.
D0 R/W 0 Reserved. Write only zero to this bit.
Page 0/Register 43: Left-DAC Digital Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 1 Left-DAC Digital Mute
0: The left-DAC channel is not muted.
1: The left-DAC channel is muted.
D6 – D0 R/W 000 0000 Left-DAC Digital Volume Control Setting
000 0000: Gain = 0 dB
000 0001: Gain = – 0.5 dB
000 0010: Gain = – 1 dB
…
111 1101: Gain = – 62.5 dB
111 1110: Gain = – 63 dB
111 1111: Gain = – 63.5 dB
Page 0/Register 44: Right-DAC Digital Volume Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 1 Right-DAC Digital Mute
0: The right-DAC channel is not muted.
1: The right-DAC channel is muted.
D6 – D0 R/W 000 0000 Right-DAC Digital Volume Control Setting
000 0000: Gain = 0 dB
000 0001: Gain = – 0.5 dB
000 0010: Gain = – 1 dB
…
111 1101: Gain = – 62.5 dB
111 1110: Gain = – 63 dB
111 1111: Gain = – 63.5 dB
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