Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- DESCRIPTION (Continued)
- PIN ASSIGNMENTS
- ABSOLUTE MAXIMUM RATINGS
- PACKAGE THERMAL RATINGS
- SYSTEM THERMAL CHARACTERISTICS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- TYPICAL CHARACTERISTICS
- OVERVIEW
- HARDWARE RESET
- DIGITAL CONTROL SERIAL INTERFACE
- I2C CONTROL INTERFACE
- I2C BUS DEBUG IN A GLITCHED SYSTEM
- DIGITAL AUDIO DATA SERIAL INTERFACE
- RIGHT-JUSTIFIED MODE
- LEFT-JUSTIFIED MODE
- I2S MODE
- DSP MODE
- TDM DATA TRANSFER
- AUDIO DATA CONVERTERS
- AUDIO CLOCK GENERATION
- STEREO AUDIO ADC
- DIGITAL AUDIO PROCESSING FOR RECORD PATH
- AUTOMATIC GAIN CONTROL (AGC)
- STEREO AUDIO DAC
- DIGITAL AUDIO PROCESSING FOR PLAYBACK
- DIGITAL INTERPOLATION FILTER
- DELTA-SIGMA AUDIO DAC
- AUDIO DAC DIGITAL VOLUME CONTROL
- INCREASING DAC DYNAMIC RANGE
- ANALOG OUTPUT COMMON-MODE ADJUSTMENT
- AUDIO DAC POWER CONTROL
- AUDIO ANALOG INPUTS
- ANALOG INPUT BYPASS PATH FUNCTIONALITY
- ADC PGA SIGNAL BYPASS PATH FUNCTIONALITY
- INPUT IMPEDANCE AND VCM CONTROL
- MICBIAS GENERATION
- PASSIVE ANALOG BYPASS DURING POWER DOWN
- ANALOG FULLY DIFFERENTIAL LINE OUTPUT DRIVERS
- ANALOG HIGH-POWER OUTPUT DRIVERS
- SHORT-CIRCUIT OUTPUT PROTECTION
- JACK/HEADSET DETECTION
- CONTROL REGISTERS
- Output Stage Volume Controls
TLV320AIC3101
www.ti.com
........................................................................................................................................ SLAS520D – FEBRUARY 2007 – REVISED DECEMBER 2008
Page 0/Register 14: Headset/Button Press Detection Register B
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 Driver Capacitive Coupling
0: Programs high-power outputs for capless driver configuration
1: Programs high-power outputs for ac-coupled driver configuration
D6
(1)
R/W 0 Stereo Output Driver Configuration A
Note: Do not set bits D6 and D3 both high at the same time.
0: A stereo fully differential output configuration is not being used
1: A stereo fully differential output configuration is being used
D5 R 0 Reserved. Write only zero to this bit.
D4 R 0 Headset Detection Flag
0: A headset has not been detected.
1: A headset has been detected.
D3
(1)
R/W 0 Stereo Output Driver Configuration B
Note: Do not set bits D6 and D3 both high at the same time.
0: A stereo pseudodifferential output configuration is not being used.
1: A stereo pseudodifferential output configuration is being used.
D2 – D0 R 000 Reserved. Write only zeros to these bits.
(1) Do not set D6 and D3 to 1 simultaneously.
Page 0/Register 15: Left-ADC PGA Gain Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 1 Left-ADC PGA Mute
0: The left-ADC PGA is not muted.
1: The left-ADC PGA is muted.
D6 – D0 R/W 000 0000 Left-ADC PGA Gain Setting
000 0000: Gain = 0 dB
000 0001: Gain = 0.5 dB
000 0010: Gain = 1 dB
…
111 0110: Gain = 59 dB
111 0111: Gain = 59.5 dB
111 1000: Gain = 59.5 dB
…
111 1111: Gain = 59.5 dB
Page 0/Register 16: Right-ADC PGA Gain Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 1 Right-ADC PGA Mute
0: The right ADC PGA is not muted.
1: The right ADC PGA is muted.
D6 – D0 R/W 000 0000 Right-ADC PGA Gain Setting
000 0000: Gain = 0 dB
000 0001: Gain = 0.5 dB
000 0010: Gain = 1 dB
…
111 0110: Gain = 59 dB
111 0111: Gain = 59.5 dB
111 1000: Gain = 59.5 dB
…
111 1111: Gain = 59.5 dB
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 53
Product Folder Link(s): TLV320AIC3101