Datasheet
TLV320AIC3100
www.ti.com
SLAS667A –NOVEMBER 2009–REVISED MAY 2012
Page 0 / Register 79: Beep Cos(x) LSB
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W 1110 0011 8 LSBs out of 16 bits for cos(2π × f
in
/f
S
), where f
in
is the beep frequency and f
S
is the DAC sample rate.
Page 0 / Register 80: Reserved
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7–D0 R/W XXXX XXXX Reserved. Write only the reset value to these bits.
Page 0 / Register 81: ADC Digital Mic
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 0: ADC channel is powered down.
1: ADC channel is powered up.
D6 R/W 0 Reserved
D5–D4 R/W 00 00: Digital microphone input is obtained from GPIO1 pin.
01: Reserved.
10: Digital microphone input is obtained from DIN pin.
11: Reserved.
D3 R/W 0 0: Digital microphone is not enabled for delta-sigma mono ADC channel.
1: Digital microphone is enabled for delta-sigma mono ADC channel
D2 R/W 0 Reserved
D1–D0 R/W 00 00: ADC channel volume control soft-stepping is enabled for one step per sample period.
01: ADC channel volume control soft-stepping is enabled for one step per two sample periods.
10: ADC channel volume control soft-stepping is disabled.
11: Reserved. Do not write this sequence to these bits.
Page 0 / Register 82: ADC Digital Volume Control Fine Adjust
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 1 0: ADC channel not muted
1: ADC channel muted
Delta-Sigma Mono ADC Channel Volume-Control Fine Gain
000: 0 dB
001: –0.1 dB
D6–D4 R/W 000 010: –0.2 dB
011: –0.3 dB
100: –0.4 dB
101–111: Reserved
D3–D0 R/W 0000 Reserved. Write only zeros to these bits.
Page 0 / Register 83: ADC Digital Volume Control Coarse Adjust
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 R/W 0 Reserved
D6–D0 000 0000 Delta-Sigma Mono ADC Channel Volume-Control Coarse Gain
100 0000–110 0111: Reserved
110 1000: –12 dB
110 1001: –11.5 dB
...
111 1111: –0.5 dB
000 0000: 0 dB
000 0001: 0.5 dB
...
010 0111: 19.5 dB
010 1000: 20 dB
010 1001–011 1111: Reserved
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