Datasheet

TLV320AIC3100
www.ti.com SLAS667A –NOVEMBER 2009–REVISED MAY 2012
Electrical Characteristics (continued)
At 25°C, AVDD = HPVDD = IOVDD = 3.3 V, SPKVDD = 3.6 V, DVDD = 1.8 V, f
S
(audio) = 48 kHz, CODEC_CLKIN = 256 ×
f
S
, PLL = Off, VOL/MICDET pin disabled (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DAC POWER CONSUMPTION
DAC power consumption is based on selected processing block, see Section 5.3.
DIGITAL INPUT/OUTPUT
Logic family CMOS
0.7 ×
I
IH
= 5 μA, IOVDD ≥ 1.6 V
IOVDD
V
IH
V
I
IH
= 5 μA, IOVDD < 1.6 V IOVDD
0.3 ×
I
IL
= 5 μA, IOVDD ≥ 1.6 V –0.3
IOVDD
V
IL
V
Logic level
I
IL
= 5 μA, IOVDD < 1.6 V 0
0.8 ×
V
OH
I
OH
= 2 TTL loads V
IOVDD
0.1 ×
V
OL
I
OL
= 2 TTL loads V
IOVDD
Capacitive load 10 pF
Copyright © 2009–2012, Texas Instruments Incorporated ELECTRICAL SPECIFICATIONS 9
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