Datasheet
TLV320AIC3100
SLAS667A –NOVEMBER 2009–REVISED MAY 2012
www.ti.com
Table 5-38. Analog Volume Control for Headphone and Speaker Outputs (for D7 = 1)
(1)
Register Value Analog Gain Register Value Analog Gain Register Value Analog Gain Register Value Analog Gain
D6–D0 (dB) D6–D0 (dB) D6–D0 (dB) D6–D0 (dB)
0 0.0 30 –15.0 60 –30.1 90 –45.2
1 –0.5 31 –15.5 61 –30.6 91 –45.8
2 –1.0 32 –16.0 62 –31.1 92 –46.2
3 –1.5 33 –16.5 63 –31.6 93 –46.7
4 –2.0 34 –17.0 64 –32.1 94 –47.4
5 –2.5 35 –17.5 65 –32.6 95 –47.9
6 –3.0 36 –18.1 66 –33.1 96 –48.2
7 –3.5 37 –18.6 67 –33.6 97 –48.7
8 –4.0 38 –19.1 68 –34.1 98 –49.3
9 –4.5 39 –19.6 69 –34.6 99 –50.0
10 –5.0 40 –20.1 70 –35.2 100 –50.3
11 –5.5 41 –20.6 71 –35.7 101 –51.0
12 –6.0 42 –21.1 72 –36.2 102 –51.4
13 –6.5 43 –21.6 73 –36.7 103 –51.8
14 –7.0 44 –22.1 74 –37.2 104 –52.2
15 –7.5 45 –22.6 75 –37.7 105 –52.7
16 –8.0 46 –23.1 76 –38.2 106 –53.7
17 –8.5 47 –23.6 77 –38.7 107 –54.2
18 –9.0 48 –24.1 78 –39.2 108 –55.3
19 –9.5 49 –24.6 79 –39.7 109 –56.7
20 –10.0 50 –25.1 80 –40.2 110 –58.3
21 –10.5 51 –25.6 81 –40.7 111 –60.2
22 –11.0 52 –26.1 82 –41.2 112 –62.7
23 –11.5 53 –26.6 83 –41.7 113 –64.3
24 –12.0 54 –27.1 84 –42.1 114 –66.2
25 –12.5 55 –27.6 85 –42.7 115 –68.7
26 –13.0 56 –28.1 86 –43.2 116 –72.2
27 –13.5 57 –28.6 87 –43.8 117–127 –78.3
28 –14.0 58 –29.1 88 –44.3
29 –14.5 59 –29.6 89 –44.8
(1) Mute when D7 = 0 and D6–D0 = 127 (0x7F)
5.5.11.3 Class-D Speaker Analog Output Volume Control
For the speaker outputs, the analog volume control has a range from 0 dB to –78 dB in 0.5-dB steps for
most of the useful range plus mute, as seen in Table 5-38. The implementation includes soft-stepping
logic.
Routing the left-channel DAC output signal to the left-channel analog volume control is done by writing to
page 1 / register 35, bit D6. Varying the left-channel analog volume for the mono speaker amplifier is
controlled by writing to page 1 / register 38, bits D6–D0.
Routing the signal from the output of the mono analog volume control to the input of the mono speaker
amplifier is done by writing to page 1 / register 38, bit D7.
The analog volume-control soft-stepping time is based on the setting in page 0 / register 63, bits D1–D0.
64 APPLICATION INFORMATION Copyright © 2009–2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TLV320AIC3100