Datasheet
TLV320AIC3007
SLOS619 – APRIL 2009 .....................................................................................................................................................................................................
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Page 0 / Register 37: DAC Power and Output Driver Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 R/W 0 Left DAC Power Control
0: Left DAC not powered up
1: Left DAC is powered up
D6 R/W 0 Right DAC Power Control
0: Right DAC not powered up
1: Right DAC is powered up
D5 – D4 R/W 00 HPCOM Output Driver Configuration Control
00: HPCOM configured as differential of HPLOUT
01: HPCOM configured as constant VCM output
10: HPCOM configured as independent single-ended output
11: Reserved. Do not write this sequence to these register bits.
D3 – D0 R 0000 Reserved. Write only zeros to these register bits.
Page 0 / Register 38: High Power Output Driver Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7-D3 R 00 Reserved. Write only zeros to these register bits.
D2 R/W 0 Short Circuit Protection Control
0: Short circuit protection on all high power output drivers is disabled
1: Short circuit protection on all high power output drivers is enabled
D1 R/W 0 Short Circuit Protection Mode Control
0: If short circuit protection enabled, it will limit the maximum current to the load
1: If short circuit protection enabled, it will power down the output driver automatically when a short
is detected
D0 R 0 Reserved. Write only zero to this register bit.
Page 0 / Register 39: Reserved Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D0 R 00000000 Reserved. Do not write to this register.
Page 0 / Register 40: High Power Output Stage Control Register
BIT READ/ RESET DESCRIPTION
WRITE VALUE
D7 – D6 R/W 00 Output Common-Mode Voltage Control
00: Output common-mode voltage = 1.35V
01: Output common-mode voltage = 1.5V
10: Output common-mode voltage = 1.65V
11: Output common-mode voltage = 1.8V
D5 – D4 R/W 00 LINE2L Bypass Path Control
00: LINE2L bypass is disabled
01: LINE2L bypass uses LINE2LP single-ended
10: LINE2L bypass uses LINE2LM single-ended
11: LINE2L bypass uses LINE2LP/M differentially
D3 – D2 R/W 00 LINE2R Bypass Path Control
00: LINE2R bypass is disabled
01: LINE2R bypass uses LINE2RP single-ended
10: LINE2R bypass uses LINE2RM single-ended
11: LINE2R bypass uses LINE2RP/M differentially
D1 – D0 R/W 00 Output Volume Control Soft-Stepping
00: Output soft-stepping = one step per Fs
01: Output soft-stepping = one step per 2Fs
10: Output soft-stepping disabled
11: Reserved. Do not write this sequence to these register bits.
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